Commit 3ccb2524 authored by Tomer Maimon's avatar Tomer Maimon Committed by Jonathan Cameron
Browse files

iio: adc: npcm: Add NPCM8XX support 



Adding ADC NPCM8XX support to NPCM ADC driver.
ADC NPCM8XX uses a different resolution and voltage reference.

As part of adding NPCM8XX support:
- Add NPCM8XX specific compatible string.
- Add data to handle architecture-specific ADC parameters.

Signed-off-by: default avatarTomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20220713132640.215916-3-tmaimon77@gmail.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent f0b4913a

drivers/iio/adc/npcm_adc.c

+29 −7
Original line number Diff line number Diff line
@@ -11,12 +11,19 @@ 
#include <linux/mod_devicetable.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/property.h>

#include <linux/regmap.h>

#include <linux/regulator/consumer.h>

#include <linux/spinlock.h>

#include <linux/uaccess.h>

#include <linux/reset.h>



struct npcm_adc_info {

	u32 data_mask;

	u32 internal_vref;

	u32 res_bits;

};



struct npcm_adc {

	bool int_status;

	u32 adc_sample_hz;
@@ -35,6 +42,7 @@ struct npcm_adc { 
	 * has finished.

	 */

	struct mutex lock;

	const struct npcm_adc_info *data;

};



/* ADC registers */
@@ -53,13 +61,21 @@ struct npcm_adc { 
#define NPCM_ADCCON_CH(x)		((x) << 24)

#define NPCM_ADCCON_DIV_SHIFT		1

#define NPCM_ADCCON_DIV_MASK		GENMASK(8, 1)

#define NPCM_ADC_DATA_MASK(x)		((x) & GENMASK(9, 0))



#define NPCM_ADC_ENABLE		(NPCM_ADCCON_ADC_EN | NPCM_ADCCON_ADC_INT_EN)



/* ADC General Definition */

#define NPCM_RESOLUTION_BITS		10

#define NPCM_INT_VREF_MV		2000

static const struct npcm_adc_info npxm7xx_adc_info = {

	.data_mask = GENMASK(9, 0),

	.internal_vref = 2048,

	.res_bits = 10,

};



static const struct npcm_adc_info npxm8xx_adc_info = {

	.data_mask = GENMASK(11, 0),

	.internal_vref = 1229,

	.res_bits = 12,

};



#define NPCM_ADC_CHAN(ch) {					\

	.type = IIO_VOLTAGE,					\
@@ -130,7 +146,8 @@ static int npcm_adc_read(struct npcm_adc *info, int *val, u8 channel) 
	if (ret < 0)

		return ret;



	*val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA));

	*val = ioread32(info->regs + NPCM_ADCDATA);

	*val &= info->data->data_mask;



	return 0;

}
@@ -158,9 +175,9 @@ static int npcm_adc_read_raw(struct iio_dev *indio_dev, 
			vref_uv = regulator_get_voltage(info->vref);

			*val = vref_uv / 1000;

		} else {

			*val = NPCM_INT_VREF_MV;

			*val = info->data->internal_vref;

		}

		*val2 = NPCM_RESOLUTION_BITS;

		*val2 = info->data->res_bits;

		return IIO_VAL_FRACTIONAL_LOG2;

	case IIO_CHAN_INFO_SAMP_FREQ:

		*val = info->adc_sample_hz;
@@ -177,7 +194,8 @@ static const struct iio_info npcm_adc_iio_info = { 
};



static const struct of_device_id npcm_adc_match[] = {

	{ .compatible = "nuvoton,npcm750-adc", },

	{ .compatible = "nuvoton,npcm750-adc", .data = &npxm7xx_adc_info},

	{ .compatible = "nuvoton,npcm845-adc", .data = &npxm8xx_adc_info},

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, npcm_adc_match);
@@ -197,6 +215,10 @@ static int npcm_adc_probe(struct platform_device *pdev) 
		return -ENOMEM;

	info = iio_priv(indio_dev);



	info->data = device_get_match_data(dev);

	if (!info->data)

		return -EINVAL;



	mutex_init(&info->lock);



	info->dev = &pdev->dev;