Commit 3cf22917 authored by Eugen Hristev's avatar Eugen Hristev Committed by Claudiu Beznea
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ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1



On this board SDMMC0 has a 1.8 signaled eMMC device powered at
3.3V. Hence, correctly describe the connected rails from the PMIC.

SDMMC1 is connected to a voltage switch that can change from
3.3V to 1.8V by a hardware controlled pin.
However SDMMC1 at the moment works only in 3.3V mode (default speed,
no UHS-I modes), thus connect the signaling to the 3.3V rail.

Signed-off-by: default avatarEugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea: reshaped a bit the commit message]
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221124154610.246790-1-eugen.hristev@microchip.com
parent 7a3c6267
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+4 −1
Original line number Diff line number Diff line
@@ -764,8 +764,9 @@ &rtt {
&sdmmc0 {
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	sdhci-caps-mask = <0x0 0x00200000>;
	vmmc-supply = <&vdd_3v3>;
	vqmmc-supply = <&vldo1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdmmc0_default>;
	status = "okay";
@@ -775,6 +776,8 @@ &sdmmc1 {
	bus-width = <4>;
	no-1-8-v;
	sdhci-caps-mask = <0x0 0x00200000>;
	vmmc-supply = <&vdd_3v3>;
	vqmmc-supply = <&vdd_3v3>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdmmc1_default>;
	status = "okay";