Commit 3cfb5bc9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'du-next-20220707' of git://linuxtv.org/pinchartl/media into drm-next 



Miscellaneous R-Car DU fixes and enhancements

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YtIEWkE0nk/8nhUc@pendragon.ideasonboard.com
parents 891ce1c9 676ad8e9

drivers/gpu/drm/rcar-du/rcar_cmm.c

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

/*

 * rcar_cmm.c -- R-Car Display Unit Color Management Module

 * R-Car Display Unit Color Management Module

 *

 * Copyright (C) 2019 Jacopo Mondi <jacopo+renesas@jmondi.org>

 */

drivers/gpu/drm/rcar-du/rcar_cmm.h

+1 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0+ */

/*

 * rcar_cmm.h -- R-Car Display Unit Color Management Module

 * R-Car Display Unit Color Management Module

 *

 * Copyright (C) 2019 Jacopo Mondi <jacopo+renesas@jmondi.org>

 */

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+6 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

/*

 * rcar_du_crtc.c  --  R-Car Display Unit CRTCs

 * R-Car Display Unit CRTCs

 *

 * Copyright (C) 2013-2015 Renesas Electronics Corporation

 *
@@ -300,6 +300,11 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) 
	     | DSMR_DIPM_DISP | DSMR_CSPM;

	rcar_du_crtc_write(rcrtc, DSMR, dsmr);



	/*

	 * When the CMM is enabled, an additional offset of 25 pixels must be

	 * subtracted from the HDS (horizontal display start) and HDE

	 * (horizontal display end) registers.

	 */

	hdse_offset = 19;

	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))

		hdse_offset += 25;

drivers/gpu/drm/rcar-du/rcar_du_crtc.h

+1 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0+ */

/*

 * rcar_du_crtc.h  --  R-Car Display Unit CRTCs

 * R-Car Display Unit CRTCs

 *

 * Copyright (C) 2013-2015 Renesas Electronics Corporation

 *

drivers/gpu/drm/rcar-du/rcar_du_drv.c

+18 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

/*

 * rcar_du_drv.c  --  R-Car Display Unit DRM driver

 * R-Car Display Unit DRM driver

 *

 * Copyright (C) 2013-2015 Renesas Electronics Corporation

 *
@@ -55,6 +55,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 4,

};



static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
@@ -77,6 +78,7 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { 
			.port = 1,

		},

	},

	.num_rpf = 4,

};



static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
@@ -104,6 +106,7 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = { 
			.port = 2,

		},

	},

	.num_rpf = 4,

};



static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
@@ -133,6 +136,7 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(1),

};
@@ -163,6 +167,7 @@ static const struct rcar_du_device_info rcar_du_r8a774b1_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(1),

};
@@ -190,6 +195,7 @@ static const struct rcar_du_device_info rcar_du_r8a774c0_info = { 
		},

	},

	.num_lvds = 2,

	.num_rpf = 4,

	.lvds_clk_mask =  BIT(1) | BIT(0),

};
@@ -220,6 +226,7 @@ static const struct rcar_du_device_info rcar_du_r8a774e1_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(1),

};
@@ -272,6 +279,7 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = { 
		},

	},

	.num_lvds = 2,

	.num_rpf = 4,

};



/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
@@ -297,6 +305,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 4,

};



static const struct rcar_du_device_info rcar_du_r8a7792_info = {
@@ -317,6 +326,7 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = { 
			.port = 1,

		},

	},

	.num_rpf = 4,

};



static const struct rcar_du_device_info rcar_du_r8a7794_info = {
@@ -340,6 +350,7 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = { 
			.port = 1,

		},

	},

	.num_rpf = 4,

};



static const struct rcar_du_device_info rcar_du_r8a7795_info = {
@@ -373,6 +384,7 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(2) | BIT(1),

};
@@ -403,6 +415,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(1),

};
@@ -433,6 +446,7 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

	.dpll_mask =  BIT(1),

};
@@ -459,6 +473,7 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = { 
		},

	},

	.num_lvds = 1,

	.num_rpf = 5,

};



static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
@@ -486,6 +501,7 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = { 
		},

	},

	.num_lvds = 2,

	.num_rpf = 5,

	.lvds_clk_mask =  BIT(1) | BIT(0),

};
@@ -505,6 +521,7 @@ static const struct rcar_du_device_info rcar_du_r8a779a0_info = { 
			.port = 1,

		},

	},

	.num_rpf = 5,

	.dsi_clk_mask =  BIT(1) | BIT(0),

};