Unverified Commit 3d2b5fdd authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-dts-for-5.20-2' of... 

Merge tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm DTS updates for v5.20

This adds an additional GSBI, hwclock, smem and tsens nodes for IPQ8064,
in addition to fixing up and improving the existing descriptions of the
platform.

USB interrupts are reordered to please the Devicetree binding.

The Light Pulse Generator is defined for PM8941 and LEDs are defined for
the FairPhone2, Nexus 5 and Sony Xperia devices.

* tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and msm8660
  ARM: dts: qcom: msm8974: Disable remoteprocs by default
  ARM: dts: qcom: ipq8064: add missing smem compatible
  ARM: dts: qcom: ipq8064: add missing hwlock
  ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node
  ARM: dts: qcom: ipq8064: fix and add some missing gsbi node
  ARM: dts: qcom: ipq8064: reduce pci IO size to 64K
  ARM: dts: qcom: ipq8064: disable usb phy by default
  ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmac
  ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulators
  ARM: dts: qcom: ipq8064: add gsbi6 missing definition
  ARM: dts: qcom: ipq8064: add multiple missing pin definition
  ARM: dts: qcom: msm8974-hammerhead: Add notification LED
  ARM: dts: qcom: msm8974-FP2: Add notification LED
  ARM: dts: qcom: msm8974-sony: Enable LPG
  ARM: dts: qcom: Add LPG node to pm8941
  ARM: dts: qcom: sdx65: reorder USB interrupts
  ARM: dts: qcom: apq8064: create tsens device node

Link: https://lore.kernel.org/r/20220720231111.2114025-1-bjorn.andersson@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d44108d8 aa7fd3bb

arch/arm/boot/dts/qcom-apq8064.dtsi

+19 −8
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ cpu0-thermal { 
			polling-delay-passive = <250>;

			polling-delay = <1000>;



			thermal-sensors = <&gcc 7>;

			thermal-sensors = <&tsens 7>;

			coefficients = <1199 0>;



			trips {
@@ -126,7 +126,7 @@ cpu1-thermal { 
			polling-delay-passive = <250>;

			polling-delay = <1000>;



			thermal-sensors = <&gcc 8>;

			thermal-sensors = <&tsens 8>;

			coefficients = <1132 0>;



			trips {
@@ -147,7 +147,7 @@ cpu2-thermal { 
			polling-delay-passive = <250>;

			polling-delay = <1000>;



			thermal-sensors = <&gcc 9>;

			thermal-sensors = <&tsens 9>;

			coefficients = <1199 0>;



			trips {
@@ -168,7 +168,7 @@ cpu3-thermal { 
			polling-delay-passive = <250>;

			polling-delay = <1000>;



			thermal-sensors = <&gcc 10>;

			thermal-sensors = <&tsens 10>;

			coefficients = <1132 0>;



			trips {
@@ -810,15 +810,24 @@ tsens_backup: backup_calib@414 { 
		};



		gcc: clock-controller@900000 {

			compatible = "qcom,gcc-apq8064";

			compatible = "qcom,gcc-apq8064", "syscon";

			reg = <0x00900000 0x4000>;

			nvmem-cells = <&tsens_calib>, <&tsens_backup>;

			nvmem-cell-names = "calib", "calib_backup";

			#clock-cells = <1>;

			#power-domain-cells = <1>;

			#reset-cells = <1>;



			tsens: thermal-sensor {

				compatible = "qcom,msm8960-tsens";



				nvmem-cells = <&tsens_calib>, <&tsens_backup>;

				nvmem-cell-names = "calib", "calib_backup";

				interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "uplow";



				#qcom,sensors = <11>;

				#thermal-sensor-cells = <1>;

			};

		};



		lcc: clock-controller@28000000 {

			compatible = "qcom,lcc-apq8064";
@@ -853,6 +862,8 @@ rpm@108000 { 
			rpmcc: clock-controller {

				compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc";

				#clock-cells = <1>;

				clocks = <&pxo_board>, <&cxo_board>;

				clock-names = "pxo", "cxo";

			};



			regulators {

arch/arm/boot/dts/qcom-ipq8064-ap148.dts

+0 −6
Original line number Diff line number Diff line
@@ -7,12 +7,6 @@ / { 


	soc {

		pinmux@800000 {

			i2c4_pins: i2c4_pinmux {

				pins = "gpio12", "gpio13";

				function = "gsbi4";

				bias-disable;

			};



			buttons_pins: buttons_pins {

				mux {

					pins = "gpio54", "gpio65";

arch/arm/boot/dts/qcom-ipq8064-rb3011.dts

+0 −9
Original line number Diff line number Diff line
@@ -307,15 +307,6 @@ mux { 
		};

	};



	mdio0_pins: mdio0_pins {

		mux {

			pins = "gpio0", "gpio1";

			function = "gpio";

			drive-strength = <8>;

			bias-disable;

		};

	};



	mdio1_pins: mdio1_pins {

		mux {

			pins = "gpio10", "gpio11";

arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi

0 → 100644
+37 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0



#include "qcom-ipq8064.dtsi"



&rpm {

	smb208_regulators: regulators {

		compatible = "qcom,rpm-smb208-regulators";



		smb208_s1a: s1a {

			regulator-min-microvolt = <1050000>;

			regulator-max-microvolt = <1150000>;



			qcom,switch-mode-frequency = <1200000>;

		};



		smb208_s1b: s1b {

			regulator-min-microvolt = <1050000>;

			regulator-max-microvolt = <1150000>;



			qcom,switch-mode-frequency = <1200000>;

		};



		smb208_s2a: s2a {

			regulator-min-microvolt = < 800000>;

			regulator-max-microvolt = <1250000>;



			qcom,switch-mode-frequency = <1200000>;

		};



		smb208_s2b: s2b {

			regulator-min-microvolt = < 800000>;

			regulator-max-microvolt = <1250000>;



			qcom,switch-mode-frequency = <1200000>;

		};

	};

};

arch/arm/boot/dts/qcom-ipq8064.dtsi

+154 −8
Original line number Diff line number Diff line
@@ -292,8 +292,11 @@ nss@40000000 { 
		};



		smem: smem@41000000 {

			compatible = "qcom,smem";

			reg = <0x41000000 0x200000>;

			no-map;



			hwlocks = <&sfpb_mutex 3>;

		};

	};
@@ -382,6 +385,13 @@ mux { 
				};

			};



			i2c4_pins: i2c4-default {

				pins = "gpio12", "gpio13";

				function = "gsbi4";

				drive-strength = <12>;

				bias-disable;

			};



			spi_pins: spi_pins {

				mux {

					pins = "gpio18", "gpio19", "gpio21";
@@ -424,6 +434,8 @@ mux { 


				pullups {

					pins = "gpio39";

					function = "nand";

					drive-strength = <10>;

					bias-pull-up;

				};
@@ -431,9 +443,32 @@ hold { 
					pins = "gpio40", "gpio41", "gpio42",

					       "gpio43", "gpio44", "gpio45",

					       "gpio46", "gpio47";

					function = "nand";

					drive-strength = <10>;

					bias-bus-hold;

				};

			};



			mdio0_pins: mdio0-pins {

				mux {

					pins = "gpio0", "gpio1";

					function = "mdio";

					drive-strength = <8>;

					bias-disable;

				};

			};



			rgmii2_pins: rgmii2-pins {

				mux {

					pins = "gpio27", "gpio28", "gpio29",

					       "gpio30", "gpio31", "gpio32",

					       "gpio51", "gpio52", "gpio59",

					       "gpio60", "gpio61", "gpio62";

					function = "rgmii2";

					drive-strength = <8>;

					bias-disable;

				};

			};

		};



		intc: interrupt-controller@2000000 {
@@ -507,6 +542,44 @@ saw1: regulator@2099000 { 
			regulator;

		};



		gsbi1: gsbi@12440000 {

			compatible = "qcom,gsbi-v1.0.0";

			reg = <0x12440000 0x100>;

			cell-index = <1>;

			clocks = <&gcc GSBI1_H_CLK>;

			clock-names = "iface";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			syscon-tcsr = <&tcsr>;



			status = "disabled";



			gsbi1_serial: serial@12450000 {

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x12450000 0x100>,

				      <0x12400000 0x03>;

				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;

				clock-names = "core", "iface";



				status = "disabled";

			};



			gsbi1_i2c: i2c@12460000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x12460000 0x1000>;

				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};

		};



		gsbi2: gsbi@12480000 {

			compatible = "qcom,gsbi-v1.0.0";

			cell-index = <2>;
@@ -530,7 +603,7 @@ gsbi2_serial: serial@12490000 { 
				status = "disabled";

			};



			i2c@124a0000 {

			gsbi2_i2c: i2c@124a0000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x124a0000 0x1000>;

				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
@@ -631,6 +704,49 @@ spi@1a280000 { 
			};

		};



		gsbi6: gsbi@16500000 {

			compatible = "qcom,gsbi-v1.0.0";

			reg = <0x16500000 0x100>;

			cell-index = <6>;

			clocks = <&gcc GSBI6_H_CLK>;

			clock-names = "iface";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			syscon-tcsr = <&tcsr>;



			status = "disabled";



			gsbi6_i2c: i2c@16580000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x16580000 0x1000>;

				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;



				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;

				clock-names = "core", "iface";



				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};



			gsbi6_spi: spi@16580000 {

				compatible = "qcom,spi-qup-v1.1.1";

				reg = <0x16580000 0x1000>;

				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;



				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;

				clock-names = "core", "iface";



				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};

		};



		gsbi7: gsbi@16600000 {

			status = "disabled";

			compatible = "qcom,gsbi-v1.0.0";
@@ -652,6 +768,20 @@ gsbi7_serial: serial@16640000 { 
				clock-names = "core", "iface";

				status = "disabled";

			};



			gsbi7_i2c: i2c@16680000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x16680000 0x1000>;

				interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;



				clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;

				clock-names = "core", "iface";



				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};

		};



		rng@1a500000 {
@@ -727,6 +857,9 @@ qfprom: qfprom@700000 { 
			reg = <0x00700000 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;

			speedbin_efuse: speedbin@c0 {

				reg = <0xc0 0x4>;

			};

			tsens_calib: calib@400 {

				reg = <0x400 0xb>;

			};
@@ -773,6 +906,8 @@ rpm: rpm@108000 { 
			rpmcc: clock-controller {

				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";

				#clock-cells = <1>;

				clocks = <&pxo_board>;

				clock-names = "pxo";

			};

		};
@@ -810,7 +945,7 @@ pcie0: pci@1b500000 { 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000   /* downstream I/O */

			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */



			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -861,7 +996,7 @@ pcie1: pci@1b700000 { 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000   /* downstream I/O */

			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */



			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -912,7 +1047,7 @@ pcie2: pci@1b900000 { 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000   /* downstream I/O */

			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */



			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
@@ -967,7 +1102,7 @@ stmmac_axi_setup: stmmac-axi-config { 


		gmac0: ethernet@37000000 {

			device_type = "network";

			compatible = "qcom,ipq806x-gmac";

			compatible = "qcom,ipq806x-gmac", "snps,dwmac";

			reg = <0x37000000 0x200000>;

			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "macirq";
@@ -991,7 +1126,7 @@ gmac0: ethernet@37000000 { 


		gmac1: ethernet@37200000 {

			device_type = "network";

			compatible = "qcom,ipq806x-gmac";

			compatible = "qcom,ipq806x-gmac", "snps,dwmac";

			reg = <0x37200000 0x200000>;

			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "macirq";
@@ -1015,7 +1150,7 @@ gmac1: ethernet@37200000 { 


		gmac2: ethernet@37400000 {

			device_type = "network";

			compatible = "qcom,ipq806x-gmac";

			compatible = "qcom,ipq806x-gmac", "snps,dwmac";

			reg = <0x37400000 0x200000>;

			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "macirq";
@@ -1039,7 +1174,7 @@ gmac2: ethernet@37400000 { 


		gmac3: ethernet@37600000 {

			device_type = "network";

			compatible = "qcom,ipq806x-gmac";

			compatible = "qcom,ipq806x-gmac", "snps,dwmac";

			reg = <0x37600000 0x200000>;

			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "macirq";
@@ -1113,6 +1248,8 @@ hs_phy_1: phy@110f8800 { 
			clocks = <&gcc USB30_1_UTMI_CLK>;

			clock-names = "ref";

			#phy-cells = <0>;



			status = "disabled";

		};



		ss_phy_1: phy@110f8830 {
@@ -1121,6 +1258,8 @@ ss_phy_1: phy@110f8830 { 
			clocks = <&gcc USB30_1_MASTER_CLK>;

			clock-names = "ref";

			#phy-cells = <0>;



			status = "disabled";

		};



		usb3_1: usb3@110f8800 {
@@ -1223,5 +1362,12 @@ sdcc3: mmc@12180000 { 
				dma-names = "tx", "rx";

			};

		};



		sfpb_mutex: hwlock@1200600 {

			compatible = "qcom,sfpb-mutex";

			reg = <0x01200600 0x100>;



			#hwlock-cells = <1>;

		};

	};

};