Commit 3d5eab41 authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon
Browse files

iommu/io-pgtable: Remove TLBI_ON_MAP quirk 



IO_PGTABLE_QUIRK_TLBI_ON_MAP is now fully superseded by the
core API's iotlb_sync_map callback.

Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/5abb80bba3a7c371d5ffb7e59c05586deddb9a91.1611764372.git.robin.murphy@arm.com


[will: Remove unused 'iop' local variable from arm_v7s_map()]
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent c867c78a

drivers/iommu/io-pgtable-arm-v7s.c

+1 −8
Original line number Diff line number Diff line
@@ -519,7 +519,6 @@ static int arm_v7s_map(struct io_pgtable_ops *ops, unsigned long iova, 
			phys_addr_t paddr, size_t size, int prot, gfp_t gfp)

{

	struct arm_v7s_io_pgtable *data = io_pgtable_ops_to_data(ops);

	struct io_pgtable *iop = &data->iop;

	int ret;



	if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias) ||
@@ -535,12 +534,7 @@ static int arm_v7s_map(struct io_pgtable_ops *ops, unsigned long iova, 
	 * Synchronise all PTE updates for the new mapping before there's

	 * a chance for anything to kick off a table walk for the new iova.

	 */

	if (iop->cfg.quirks & IO_PGTABLE_QUIRK_TLBI_ON_MAP) {

		io_pgtable_tlb_flush_walk(iop, iova, size,

					  ARM_V7S_BLOCK_SIZE(2));

	} else {

	wmb();

	}



	return ret;

}
@@ -759,7 +753,6 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, 


	if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS |

			    IO_PGTABLE_QUIRK_NO_PERMS |

			    IO_PGTABLE_QUIRK_TLBI_ON_MAP |

			    IO_PGTABLE_QUIRK_ARM_MTK_EXT |

			    IO_PGTABLE_QUIRK_NON_STRICT))

		return NULL;

include/linux/io-pgtable.h

+0 −5
Original line number Diff line number Diff line
@@ -68,10 +68,6 @@ struct io_pgtable_cfg { 
	 *	hardware which does not implement the permissions of a given

	 *	format, and/or requires some format-specific default value.

	 *

	 * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid

	 *	(unmapped) entries but the hardware might do so anyway, perform

	 *	TLB maintenance when mapping as well as when unmapping.

	 *

	 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend

	 *	to support up to 34 bits PA where the bit32 and bit33 are

	 *	encoded in the bit9 and bit4 of the PTE respectively.
@@ -88,7 +84,6 @@ struct io_pgtable_cfg { 
	 */

	#define IO_PGTABLE_QUIRK_ARM_NS		BIT(0)

	#define IO_PGTABLE_QUIRK_NO_PERMS	BIT(1)

	#define IO_PGTABLE_QUIRK_TLBI_ON_MAP	BIT(2)

	#define IO_PGTABLE_QUIRK_ARM_MTK_EXT	BIT(3)

	#define IO_PGTABLE_QUIRK_NON_STRICT	BIT(4)

	#define IO_PGTABLE_QUIRK_ARM_TTBR1	BIT(5)