Commit 3da35006 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Enable mem low power control for DCN3.1 sub-IP blocks



[WHY]
Sequences to handle powering down these sub-IP blocks are now ready for use

Reviewed-by: default avatarEric Yang <eric.yang2@amd.com>
Acked-by: default avatarMikita Lipski <mikita.lipski@amd.com>
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0c55b63b
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+8 −8
Original line number Diff line number Diff line
@@ -1009,15 +1009,15 @@ static const struct dc_debug_options debug_defaults_drv = {
	.use_max_lb = true,
	.enable_mem_low_power = {
		.bits = {
			.vga = false,
			.i2c = false,
			.vga = true,
			.i2c = true,
			.dmcu = false, // This is previously known to cause hang on S3 cycles if enabled
			.dscl = false,
			.cm = false,
			.mpc = false,
			.optc = false,
			.vpg = false,
			.afmt = false,
			.dscl = true,
			.cm = true,
			.mpc = true,
			.optc = true,
			.vpg = true,
			.afmt = true,
		}
	},
	.optimize_edp_link_rate = true,