Loading drivers/net/ethernet/sfc/efx.c +19 −14 Original line number Diff line number Diff line Loading @@ -656,12 +656,16 @@ static void efx_stop_datapath(struct efx_nic *efx) struct efx_channel *channel; struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; struct pci_dev *dev = efx->pci_dev; int rc; EFX_ASSERT_RESET_SERIALISED(efx); BUG_ON(efx->port_enabled); /* Only perform flush if dma is enabled */ if (dev->is_busmaster) { rc = efx_nic_flush_queues(efx); if (rc && EFX_WORKAROUND_7803(efx)) { /* Schedule a reset to recover from the flush failure. The * descriptor caches reference memory we're about to free, Loading @@ -676,6 +680,7 @@ static void efx_stop_datapath(struct efx_nic *efx) netif_dbg(efx, drv, efx->net_dev, "successfully flushed all queues\n"); } } efx_for_each_channel(channel, efx) { /* RX packet processing is pipelined, so wait for the Loading Loading
drivers/net/ethernet/sfc/efx.c +19 −14 Original line number Diff line number Diff line Loading @@ -656,12 +656,16 @@ static void efx_stop_datapath(struct efx_nic *efx) struct efx_channel *channel; struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; struct pci_dev *dev = efx->pci_dev; int rc; EFX_ASSERT_RESET_SERIALISED(efx); BUG_ON(efx->port_enabled); /* Only perform flush if dma is enabled */ if (dev->is_busmaster) { rc = efx_nic_flush_queues(efx); if (rc && EFX_WORKAROUND_7803(efx)) { /* Schedule a reset to recover from the flush failure. The * descriptor caches reference memory we're about to free, Loading @@ -676,6 +680,7 @@ static void efx_stop_datapath(struct efx_nic *efx) netif_dbg(efx, drv, efx->net_dev, "successfully flushed all queues\n"); } } efx_for_each_channel(channel, efx) { /* RX packet processing is pipelined, so wait for the Loading