Unverified Commit 3ed9222c authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'memory-controller-drv-5.20' of...

Merge tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.20

Add MediaTek MT6795 Helio X10 SMI support.

* tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: mtk-smi: Add support for MT6795 Helio X10
  dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindings

Link: https://lore.kernel.org/r/20220624081828.33649-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents aa61fa3e 0d97f217
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+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ properties:
          - mediatek,mt2701-smi-common
          - mediatek,mt2712-smi-common
          - mediatek,mt6779-smi-common
          - mediatek,mt6795-smi-common
          - mediatek,mt8167-smi-common
          - mediatek,mt8173-smi-common
          - mediatek,mt8183-smi-common
+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ properties:
          - mediatek,mt2701-smi-larb
          - mediatek,mt2712-smi-larb
          - mediatek,mt6779-smi-larb
          - mediatek,mt6795-smi-larb
          - mediatek,mt8167-smi-larb
          - mediatek,mt8173-smi-larb
          - mediatek,mt8183-smi-larb
+17 −0
Original line number Diff line number Diff line
@@ -21,11 +21,13 @@
/* SMI COMMON */
#define SMI_L1LEN			0x100

#define SMI_L1_ARB			0x200
#define SMI_BUS_SEL			0x220
#define SMI_BUS_LARB_SHIFT(larbid)	((larbid) << 1)
/* All are MMU0 defaultly. Only specialize mmu1 here. */
#define F_MMU1_LARB(larbid)		(0x1 << SMI_BUS_LARB_SHIFT(larbid))

#define SMI_READ_FIFO_TH		0x230
#define SMI_M4U_TH			0x234
#define SMI_FIFO_TH1			0x238
#define SMI_FIFO_TH2			0x23c
@@ -360,6 +362,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = {
	{.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
	{.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
	{.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
	{.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
	{.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
	{.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
	{.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
@@ -544,6 +547,13 @@ static struct platform_driver mtk_smi_larb_driver = {
	}
};

static const struct mtk_smi_reg_pair mtk_smi_common_mt6795_init[SMI_COMMON_INIT_REGS_NR] = {
	{SMI_L1_ARB, 0x1b},
	{SMI_M4U_TH, 0xce810c85},
	{SMI_FIFO_TH1, 0x43214c8},
	{SMI_READ_FIFO_TH, 0x191f},
};

static const struct mtk_smi_reg_pair mtk_smi_common_mt8195_init[SMI_COMMON_INIT_REGS_NR] = {
	{SMI_L1LEN, 0xb},
	{SMI_M4U_TH, 0xe100e10},
@@ -568,6 +578,12 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
		    F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
};

static const struct mtk_smi_common_plat mtk_smi_common_mt6795 = {
	.type	  = MTK_SMI_GEN2,
	.bus_sel  = F_MMU1_LARB(0),
	.init     = mtk_smi_common_mt6795_init,
};

static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
	.type     = MTK_SMI_GEN2,
	.has_gals = true,
@@ -612,6 +628,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = {
	{.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
	{.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
	{.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
	{.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
	{.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
	{.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
	{.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},