Commit 41ed65e7 authored by Ludovic Barre's avatar Ludovic Barre Committed by Ulf Hansson
Browse files

mmc: mmci: replace blksz_datactrlXX by get_datactrl_cfg callback 



This patch allows to get datactrl configuration specific
at variant. This introduce more flexibility on datactlr
value.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 8372f9d0

drivers/mmc/host/mmci.c

+2 −24
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ static struct variant_data variant_arm = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.reversed_irq_handling	= true,
@@ -80,7 +79,6 @@ static struct variant_data variant_arm_extended_fifo = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.mmcimask1		= true,
@@ -100,7 +98,6 @@ static struct variant_data variant_arm_extended_fifo_hwfc = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.mmcimask1		= true,
@@ -121,7 +118,6 @@ static struct variant_data variant_u300 = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio			= true,

	.pwrreg_powerup		= MCI_PWR_ON,
@@ -147,7 +143,6 @@ static struct variant_data variant_nomadik = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -176,7 +171,6 @@ static struct variant_data variant_ux500 = { 
	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -210,11 +204,9 @@ static struct variant_data variant_ux500v2 = { 
	.datactrl_mask_ddrmode	= MCI_DPSM_ST_DDRMODE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,

	.blksz_datactrl16	= true,

	.pwrreg_powerup		= MCI_PWR_ON,

	.f_max			= 100000000,

	.signal_direction	= true,
@@ -245,7 +237,6 @@ static struct variant_data variant_stm32 = { 
	.irq_pio_mask		= MCI_IRQ_PIO_MASK,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -289,10 +280,8 @@ static struct variant_data variant_qcom = { 
	.cmdreg_srsp_crc	= MCI_CPSM_RESPONSE,

	.cmdreg_srsp		= MCI_CPSM_RESPONSE,

	.data_cmd_enable	= MCI_CPSM_QCOM_DATCMD,

	.blksz_datactrl4	= true,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_dpsm_enable	= MCI_DPSM_ENABLE,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 208000000,

	.explicit_mclk_control	= true,
@@ -1007,7 +996,6 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) 
	unsigned int datactrl, timeout, irqmask;

	unsigned long long clks;

	void __iomem *base;

	int blksz_bits;



	dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n",

		data->blksz, data->blocks, data->flags);
@@ -1025,18 +1013,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) 
	writel(timeout, base + MMCIDATATIMER);

	writel(host->size, base + MMCIDATALENGTH);



	blksz_bits = ffs(data->blksz) - 1;

	BUG_ON(1 << blksz_bits != data->blksz);



	if (variant->blksz_datactrl16)

		datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16);

	else if (variant->blksz_datactrl4)

		datactrl = variant->datactrl_dpsm_enable | (data->blksz << 4);

	else

		datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;



	if (data->flags & MMC_DATA_READ)

		datactrl |= MCI_DPSM_DIRECTION;

	datactrl = host->ops->get_datactrl_cfg(host);

	datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0;



	if (host->mmc->card && mmc_card_sdio(host->mmc->card)) {

		u32 clk;

drivers/mmc/host/mmci.h

+0 −7
Original line number Diff line number Diff line
@@ -280,12 +280,8 @@ struct mmci_host; 
 * @st_clkdiv: true if using a ST-specific clock divider algorithm

 * @stm32_clkdiv: true if using a STM32-specific clock divider algorithm

 * @datactrl_mask_ddrmode: ddr mode mask in datactrl register.

 * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register

 * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl

 *		     register

 * @datactrl_mask_sdio: SDIO enable mask in datactrl register

 * @datactrl_blksz: block size in power of two

 * @datactrl_dpsm_enable: enable value for DPSM

 * @datactrl_first: true if data must be setup before send command

 * @datacnt_useless: true if you could not use datacnt register to read

 *		     remaining data
@@ -330,14 +326,11 @@ struct variant_data { 
	unsigned int		datactrl_mask_ddrmode;

	unsigned int		datactrl_mask_sdio;

	unsigned int		datactrl_blocksz;

	unsigned int		datactrl_dpsm_enable;

	u8			datactrl_first:1;

	u8			datacnt_useless:1;

	u8			st_sdio:1;

	u8			st_clkdiv:1;

	u8			stm32_clkdiv:1;

	u8			blksz_datactrl16:1;

	u8			blksz_datactrl4:1;

	u32			pwrreg_powerup;

	u32			f_max;

	u8			signal_direction:1;