Commit 43602f2c authored by Larry Finger's avatar Larry Finger
Browse files

staging: rtl8192e: Convert typedef RF90_RADIO_PATH_E to enum rf90_radio_path



Remove typedef from enum.
Rename enum.
Rename uses.

Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
parent afa087dd
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+17 −17
Original line number Diff line number Diff line
@@ -34,9 +34,9 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth)
		switch (Bandwidth) {
		case HT_CHANNEL_WIDTH_20:
			if (priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE) {
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100);
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7);
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x100);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3d7);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x021);

			} else {
				RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
@@ -45,9 +45,9 @@ void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth)
			break;
		case HT_CHANNEL_WIDTH_20_40:
			if (priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE) {
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300);
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3ff);
				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0e1);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0b, bMask12Bits, 0x300);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x2c, bMask12Bits, 0x3ff);
				rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, 0x0e, bMask12Bits, 0x0e1);

			} else {
				RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
@@ -87,7 +87,7 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
	u8	ConstRetryTimes = 5, RetryTimes = 5;
	u8 ret = 0;

	for (eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) {
	for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) {
		if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
				continue;

@@ -112,9 +112,9 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);
		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);

		rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf);
		rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path) eRFPath, 0x0, bMask12Bits, 0xbf);

		rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath);
		rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum rf90_radio_path)eRFPath);
		if (rtStatus!= true) {
			RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
			goto phy_RF8256_Config_ParaFile_Fail;
@@ -125,32 +125,32 @@ bool phy_RF8256_Config_ParaFile(struct net_device* dev)
		switch (eRFPath) {
		case RF90_PATH_A:
			while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
				RetryTimes--;
			}
			break;
		case RF90_PATH_B:
			while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
				RetryTimes--;
			}
			break;
		case RF90_PATH_C:
			while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
				RetryTimes--;
			}
			break;
		case RF90_PATH_D:
			while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(enum rf90_radio_path)eRFPath);
				RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)eRFPath, RegOffSetToBeCheck, bMask12Bits);
				RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
				RetryTimes--;
			}
+12 −12
Original line number Diff line number Diff line
@@ -47,8 +47,8 @@ static u32 RF_CHANNEL_TABLE_ZEBRA[] = {

/*************************Define local function prototype**********************/

static u32 phy_FwRFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E	eRFPath,u32 Offset);
static void phy_FwRFSerialWrite(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset,u32	Data);
static u32 phy_FwRFSerialRead(struct net_device* dev,enum rf90_radio_path eRFPath,u32 Offset);
static void phy_FwRFSerialWrite(struct net_device* dev,enum rf90_radio_path eRFPath,u32 Offset,u32	Data);
u32 rtl8192_CalculateBitShift(u32 dwBitMask)
{
	u32 i;
@@ -99,7 +99,7 @@ u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask)

	return (Ret);
}
u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)
u32 rtl8192_phy_RFSerialRead(struct net_device* dev, enum rf90_radio_path eRFPath, u32 Offset)
{
	struct r8192_priv *priv = rtllib_priv(dev);
	u32 ret = 0;
@@ -160,7 +160,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath,

}

void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)
void rtl8192_phy_RFSerialWrite(struct net_device* dev, enum rf90_radio_path eRFPath, u32 Offset, u32 Data)
{
	struct r8192_priv *priv = rtllib_priv(dev);
	u32 DataAndAddr = 0, NewOffset = 0;
@@ -218,7 +218,7 @@ void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath
	return;
}

void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
void rtl8192_phy_SetRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
	struct r8192_priv *priv = rtllib_priv(dev);
	u32 Original_Value, BitShift, New_Value;
@@ -258,7 +258,7 @@ void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32
	return;
}

u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
u32 rtl8192_phy_QueryRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask)
{
	u32 Original_Value, Readback_Value, BitShift;
	struct r8192_priv *priv = rtllib_priv(dev);
@@ -285,7 +285,7 @@ u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u3

static u32 phy_FwRFSerialRead(
	struct net_device* dev,
	RF90_RADIO_PATH_E	eRFPath,
	enum rf90_radio_path eRFPath,
	u32				Offset	)
{
	u32		retValue = 0;
@@ -322,7 +322,7 @@ static u32 phy_FwRFSerialRead(
static void
phy_FwRFSerialWrite(
		struct net_device* dev,
		RF90_RADIO_PATH_E	eRFPath,
		enum rf90_radio_path eRFPath,
		u32				Offset,
		u32				Data	)
{
@@ -510,7 +510,7 @@ void rtl8192_InitBBRFRegDef(struct net_device* dev)
	priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;

}
bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, RF90_RADIO_PATH_E eRFPath)
bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, enum rf90_radio_path eRFPath)
{
	bool ret = true;
	u32 i, CheckTimes = 4, dwRegRead = 0;
@@ -578,7 +578,7 @@ bool rtl8192_BB_Config_ParaFile(struct net_device* dev)

	for (eCheckItem=(enum hw90_block)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++)
	{
		rtStatus  = rtl8192_phy_checkBBAndRF(dev, (enum hw90_block)eCheckItem, (RF90_RADIO_PATH_E)0);
		rtStatus  = rtl8192_phy_checkBBAndRF(dev, (enum hw90_block)eCheckItem, (enum rf90_radio_path)0);
		if (rtStatus != true)
		{
			RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():Check PHY%d Fail!!\n", eCheckItem-1);
@@ -741,7 +741,7 @@ void rtl8192_phy_updateInitGain(struct net_device* dev)
	return;
}

u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E	eRFPath)
u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, enum rf90_radio_path eRFPath)
{

	int i;
@@ -969,7 +969,7 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* stage, u
				break;
			case CmdID_RF_WriteReg:
				for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
					rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bMask12Bits, CurrentCmd->Para2<<7);
					rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path)eRFPath, CurrentCmd->Para1, bMask12Bits, CurrentCmd->Para2<<7);
				break;
			default:
				break;
+6 −6
Original line number Diff line number Diff line
@@ -81,13 +81,13 @@ enum hw90_block {
	HW90_BLOCK_MAXIMUM = 4,
};

typedef enum _RF90_RADIO_PATH_E{
enum rf90_radio_path {
	RF90_PATH_A = 0,
	RF90_PATH_B = 1,
	RF90_PATH_C = 2,
	RF90_PATH_D = 3,
	RF90_PATH_MAX
} RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
};

#define bMaskByte0                0xff
#define bMaskByte1                0xff00
@@ -100,17 +100,17 @@ typedef enum _RF90_RADIO_PATH_E{
extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath);
extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData);
extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask);
extern void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask);
extern void rtl8192_phy_SetRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask);
extern void rtl8192_phy_configmac(struct net_device* dev);
extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType);
extern bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, RF90_RADIO_PATH_E eRFPath);
extern bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, enum rf90_radio_path eRFPath);
extern bool rtl8192_BBConfig(struct net_device* dev);
extern void rtl8192_phy_getTxPower(struct net_device* dev);
extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel);
extern bool rtl8192_phy_RFConfig(struct net_device* dev);
extern void rtl8192_phy_updateInitGain(struct net_device* dev);
extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E	eRFPath);
extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, enum rf90_radio_path eRFPath);

extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel);
extern void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH	Bandwidth, HT_EXTCHNL_OFFSET Offset);
+4 −4
Original line number Diff line number Diff line
@@ -589,7 +589,7 @@ static int proc_get_reg_rf_a(char *page, char **start,
		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
		for (i=0;i<4 && n<=max;n+=4,i++)
			len += snprintf(page + len, count - len,
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,n, bMaskDWord));
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)RF90_PATH_A,n, bMaskDWord));
	}
	len += snprintf(page + len, count - len,"\n");
	*eof = 1;
@@ -615,7 +615,7 @@ static int proc_get_reg_rf_b(char *page, char **start,
		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
		for (i=0;i<4 && n<=max;n+=4,i++)
			len += snprintf(page + len, count - len,
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_B, n, bMaskDWord));
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)RF90_PATH_B, n, bMaskDWord));
	}
	len += snprintf(page + len, count - len,"\n");
	*eof = 1;
@@ -641,7 +641,7 @@ static int proc_get_reg_rf_c(char *page, char **start,
		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
		for (i=0;i<4 && n<=max;n+=4,i++)
			len += snprintf(page + len, count - len,
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_C, n, bMaskDWord));
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)RF90_PATH_C, n, bMaskDWord));
	}
	len += snprintf(page + len, count - len,"\n");
	*eof = 1;
@@ -667,7 +667,7 @@ static int proc_get_reg_rf_d(char *page, char **start,
		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
		for (i=0;i<4 && n<=max;n+=4,i++)
			len += snprintf(page + len, count - len,
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_D, n, bMaskDWord));
					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (enum rf90_radio_path)RF90_PATH_D, n, bMaskDWord));
	}
	len += snprintf(page + len, count - len,"\n");
	*eof = 1;