Commit 43d78445 authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: interrupt-controller: Drop unneeded quotes 



Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230320233928.2920693-1-robh@kernel.org


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 32671977

Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml

+2 −2
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ properties: 
      The first cell is the input IRQ number, between 0 and 2, while the second

      cell is the trigger type as defined in interrupt.txt in this directory.



  'interrupts':

  interrupts:

    description: |

      Contains the GIC SPI IRQs mapped to the external interrupt lines.

      They shall be specified sequentially from output 0 to 2.
@@ -44,7 +44,7 @@ required: 
  - reg

  - interrupt-controller

  - '#interrupt-cells'

  - 'interrupts'

  - interrupts



additionalProperties: false

Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml

+2 −2
Original line number Diff line number Diff line
@@ -48,13 +48,13 @@ properties: 
    const: 1



  fsl,channel:

    $ref: '/schemas/types.yaml#/definitions/uint32'

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      u32 value representing the output channel that all input IRQs should be

      steered into.



  fsl,num-irqs:

    $ref: '/schemas/types.yaml#/definitions/uint32'

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      u32 value representing the number of input interrupts of this channel,

      should be multiple of 32 input interrupts and up to 512 interrupts.

Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml

+2 −2
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"

$id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel I/O Advanced Programmable Interrupt Controller (IO APIC)

Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml

+2 −2
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"

$id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel Local Advanced Programmable Interrupt Controller (LAPIC)

Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml

+2 −2
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@@ -2,8 +2,8 @@ 
# Copyright 2018 Linaro Ltd.

%YAML 1.2

---

$id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"

$id: http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel IXP4xx XScale Networking Processors Interrupt Controller