Commit 43e6f457 authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: Move fixed string node names under 'properties' 



Fixed string node names should be under 'properties' rather than
'patternProperties'. Additionally, without beginning and end of line
anchors, any prefix or suffix is allowed on the specified node name.
These cases don't appear to want a prefix or suffix, so move them under
'properties'.

In some cases, the diff turns out to look like we're moving some
patterns rather than the fixed string properties.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221118223708.1721134-1-robh@kernel.org


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 11b93281

Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml

+27 −27
Original line number Diff line number Diff line
@@ -123,6 +123,33 @@ properties: 
      some PLLs, clocks and then brings up CPU0 for resuming the

      system.



  core-supply:

    description:

      Phandle to voltage regulator connected to the SoC Core power rail.



  core-domain:

    type: object

    description: |

      The vast majority of hardware blocks of Tegra SoC belong to a

      Core power domain, which has a dedicated voltage rail that powers

      the blocks.



    properties:

      operating-points-v2:

        description:

          Should contain level, voltages and opp-supported-hw property.

          The supported-hw is a bitfield indicating SoC speedo or process

          ID mask.



      "#power-domain-cells":

        const: 0



    required:

      - operating-points-v2

      - "#power-domain-cells"



    additionalProperties: false



  i2c-thermtrip:

    type: object

    description:
@@ -300,33 +327,6 @@ patternProperties: 


    additionalProperties: false



  core-domain:

    type: object

    description: |

      The vast majority of hardware blocks of Tegra SoC belong to a

      Core power domain, which has a dedicated voltage rail that powers

      the blocks.



    properties:

      operating-points-v2:

        description:

          Should contain level, voltages and opp-supported-hw property.

          The supported-hw is a bitfield indicating SoC speedo or process

          ID mask.



      "#power-domain-cells":

        const: 0



    required:

      - operating-points-v2

      - "#power-domain-cells"



    additionalProperties: false



  core-supply:

    description:

      Phandle to voltage regulator connected to the SoC Core power rail.



required:

  - compatible

  - reg

Documentation/devicetree/bindings/regulator/ti,tps65219.yaml

+7 −7
Original line number Diff line number Diff line
@@ -51,13 +51,6 @@ properties: 
      where the board has a button wired to the pin and triggers

      an interrupt on pressing it.



patternProperties:

  "^buck[1-3]-supply$":

    description: Input supply phandle of one regulator.



  "^ldo[1-4]-supply$":

    description: Input supply phandle of one regulator.



  regulators:

    type: object

    description: |
@@ -82,6 +75,13 @@ patternProperties: 


    additionalProperties: false



patternProperties:

  "^buck[1-3]-supply$":

    description: Input supply phandle of one regulator.



  "^ldo[1-4]-supply$":

    description: Input supply phandle of one regulator.



required:

  - compatible

  - reg

Documentation/devicetree/bindings/sound/tlv320adcx140.yaml

+32 −32
Original line number Diff line number Diff line
@@ -109,38 +109,6 @@ properties: 
      maximum: 7

    default: [0, 0, 0, 0]



  ti,asi-tx-drive:

    type: boolean

    description: |

      When set the device will set the Tx ASI output to a Hi-Z state for unused

      data cycles. Default is to drive the output low on unused ASI cycles.



patternProperties:

  '^ti,gpo-config-[1-4]$':

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description: |

       Defines the configuration and output driver for the general purpose

       output pins (GPO).  These values are pairs, the first value is for the

       configuration type and the second value is for the output drive type.

       The array is defined as <GPO_CFG GPO_DRV>



       GPO output configuration can be one of the following:



       0 - (default) disabled

       1 - GPOX is configured as a general-purpose output (GPO)

       2 - GPOX is configured as a device interrupt output (IRQ)

       3 - GPOX is configured as a secondary ASI output (SDOUT2)

       4 - GPOX is configured as a PDM clock output (PDMCLK)



       GPO output drive configuration for the GPO pins can be one of the following:



       0d - (default) Hi-Z output

       1d - Drive active low and active high

       2d - Drive active low and weak high

       3d - Drive active low and Hi-Z

       4d - Drive weak low and active high

       5d - Drive Hi-Z and active high



  ti,gpio-config:

    description: |

       Defines the configuration and output drive for the General Purpose
@@ -183,6 +151,38 @@ patternProperties: 
      maximum: 15

    default: [2, 2]



  ti,asi-tx-drive:

    type: boolean

    description: |

      When set the device will set the Tx ASI output to a Hi-Z state for unused

      data cycles. Default is to drive the output low on unused ASI cycles.



patternProperties:

  '^ti,gpo-config-[1-4]$':

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description: |

       Defines the configuration and output driver for the general purpose

       output pins (GPO).  These values are pairs, the first value is for the

       configuration type and the second value is for the output drive type.

       The array is defined as <GPO_CFG GPO_DRV>



       GPO output configuration can be one of the following:



       0 - (default) disabled

       1 - GPOX is configured as a general-purpose output (GPO)

       2 - GPOX is configured as a device interrupt output (IRQ)

       3 - GPOX is configured as a secondary ASI output (SDOUT2)

       4 - GPOX is configured as a PDM clock output (PDMCLK)



       GPO output drive configuration for the GPO pins can be one of the following:



       0d - (default) Hi-Z output

       1d - Drive active low and active high

       2d - Drive active low and weak high

       3d - Drive active low and Hi-Z

       4d - Drive weak low and active high

       5d - Drive Hi-Z and active high



required:

  - compatible

  - reg