Loading arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +9 −34 Original line number Diff line number Diff line Loading @@ -125,21 +125,11 @@ &i2c0 { tca6416_u97: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; gpio-controller; /* IRQ not connected */ #gpio-cells = <2>; /* * IRQ not connected * Lines: * 0 - PS_GTR_LAN_SEL0 * 1 - PS_GTR_LAN_SEL1 * 2 - PS_GTR_LAN_SEL2 * 3 - PS_GTR_LAN_SEL3 * 4 - PCI_CLK_DIR_SEL * 5 - IIC_MUX_RESET_B * 6 - GEM3_EXP_RESET_B * 7, 10 - 17 - not connected */ gpio-line-names = "PS_GTR_LAN_SEL0", "PS_GTR_LAN_SEL1", "PS_GTR_LAN_SEL2", "PS_GTR_LAN_SEL3", "PCI_CLK_DIR_SEL", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "", "", "", "", "", "", "", "", ""; gtr-sel0 { gpio-hog; gpios = <0 0>; Loading Loading @@ -169,27 +159,12 @@ gtr-sel3 { tca6416_u61: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; gpio-controller; gpio-controller; /* IRQ not connected */ #gpio-cells = <2>; /* * IRQ not connected * Lines: * 0 - VCCPSPLL_EN * 1 - MGTRAVCC_EN * 2 - MGTRAVTT_EN * 3 - VCCPSDDRPLL_EN * 4 - MIO26_PMU_INPUT_LS * 5 - PL_PMBUS_ALERT * 6 - PS_PMBUS_ALERT * 7 - MAXIM_PMBUS_ALERT * 10 - PL_DDR4_VTERM_EN * 11 - PL_DDR4_VPP_2V5_EN * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON * 13 - PS_DIMM_SUSPEND_EN * 14 - PS_DDR4_VTERM_EN * 15 - PS_DDR4_VPP_2V5_EN * 16 - 17 - not connected */ gpio-line-names = "VCCPSPLL_EN", "MGTRAVCC_EN", "MGTRAVTT_EN", "VCCPSDDRPLL_EN", "MIO26_PMU_INPUT_LS", "PL_PMBUS_ALERT", "PS_PMBUS_ALERT", "MAXIM_PMBUS_ALERT", "PL_DDR4_VTERM_EN", "PL_DDR4_VPP_2V5_EN", "PS_DIMM_VDDQ_TO_PSVCCO_ON", "PS_DIMM_SUSPEND_EN", "PS_DDR4_VTERM_EN", "PS_DDR4_VPP_2V5_EN", "", ""; }; i2c-mux@75 { /* u60 */ Loading Loading
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +9 −34 Original line number Diff line number Diff line Loading @@ -125,21 +125,11 @@ &i2c0 { tca6416_u97: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; gpio-controller; /* IRQ not connected */ #gpio-cells = <2>; /* * IRQ not connected * Lines: * 0 - PS_GTR_LAN_SEL0 * 1 - PS_GTR_LAN_SEL1 * 2 - PS_GTR_LAN_SEL2 * 3 - PS_GTR_LAN_SEL3 * 4 - PCI_CLK_DIR_SEL * 5 - IIC_MUX_RESET_B * 6 - GEM3_EXP_RESET_B * 7, 10 - 17 - not connected */ gpio-line-names = "PS_GTR_LAN_SEL0", "PS_GTR_LAN_SEL1", "PS_GTR_LAN_SEL2", "PS_GTR_LAN_SEL3", "PCI_CLK_DIR_SEL", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "", "", "", "", "", "", "", "", ""; gtr-sel0 { gpio-hog; gpios = <0 0>; Loading Loading @@ -169,27 +159,12 @@ gtr-sel3 { tca6416_u61: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; gpio-controller; gpio-controller; /* IRQ not connected */ #gpio-cells = <2>; /* * IRQ not connected * Lines: * 0 - VCCPSPLL_EN * 1 - MGTRAVCC_EN * 2 - MGTRAVTT_EN * 3 - VCCPSDDRPLL_EN * 4 - MIO26_PMU_INPUT_LS * 5 - PL_PMBUS_ALERT * 6 - PS_PMBUS_ALERT * 7 - MAXIM_PMBUS_ALERT * 10 - PL_DDR4_VTERM_EN * 11 - PL_DDR4_VPP_2V5_EN * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON * 13 - PS_DIMM_SUSPEND_EN * 14 - PS_DDR4_VTERM_EN * 15 - PS_DDR4_VPP_2V5_EN * 16 - 17 - not connected */ gpio-line-names = "VCCPSPLL_EN", "MGTRAVCC_EN", "MGTRAVTT_EN", "VCCPSDDRPLL_EN", "MIO26_PMU_INPUT_LS", "PL_PMBUS_ALERT", "PS_PMBUS_ALERT", "MAXIM_PMBUS_ALERT", "PL_DDR4_VTERM_EN", "PL_DDR4_VPP_2V5_EN", "PS_DIMM_VDDQ_TO_PSVCCO_ON", "PS_DIMM_SUSPEND_EN", "PS_DDR4_VTERM_EN", "PS_DDR4_VPP_2V5_EN", "", ""; }; i2c-mux@75 { /* u60 */ Loading