Commit 458ebdbb authored by David Heidelberg's avatar David Heidelberg Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: timer should use only 32-bit size 



There's no reason the timer needs > 32-bits of address or size.
Since we using 32-bit size, we need to define ranges properly.

Fixes warnings as:
```
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: timer@17c90000: #size-cells:0:0: 1 was expected
        From schema: Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
```

Signed-off-by: default avatarDavid Heidelberg <david@ixit.cz>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220626105800.35586-1-david@ixit.cz
parent 0e3e6546

arch/arm64/boot/dts/qcom/ipq6018.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -525,9 +525,9 @@ timer { 
		};



		timer@b120000 {

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0 0x10000000>;

			compatible = "arm,armv7-timer-mem";

			reg = <0x0 0x0b120000 0x0 0x1000>;
@@ -535,49 +535,49 @@ frame@b120000 { 
				frame-number = <0>;

				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b121000 0x0 0x1000>,

				      <0x0 0x0b122000 0x0 0x1000>;

				reg = <0x0b121000 0x1000>,

				      <0x0b122000 0x1000>;

			};



			frame@b123000 {

				frame-number = <1>;

				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0xb123000 0x0 0x1000>;

				reg = <0x0b123000 0x1000>;

				status = "disabled";

			};



			frame@b124000 {

				frame-number = <2>;

				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b124000 0x0 0x1000>;

				reg = <0x0b124000 0x1000>;

				status = "disabled";

			};



			frame@b125000 {

				frame-number = <3>;

				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b125000 0x0 0x1000>;

				reg = <0x0b125000 0x1000>;

				status = "disabled";

			};



			frame@b126000 {

				frame-number = <4>;

				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b126000 0x0 0x1000>;

				reg = <0x0b126000 0x1000>;

				status = "disabled";

			};



			frame@b127000 {

				frame-number = <5>;

				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b127000 0x0 0x1000>;

				reg = <0x0b127000 0x1000>;

				status = "disabled";

			};



			frame@b128000 {

				frame-number = <6>;

				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x0b128000 0x0 0x1000>;

				reg = <0x0b128000 0x1000>;

				status = "disabled";

			};

		};

arch/arm64/boot/dts/qcom/sc7180.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -3379,9 +3379,9 @@ watchdog@17c10000 { 
		};



		timer@17c20000{

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0 0x20000000>;

			compatible = "arm,armv7-timer-mem";

			reg = <0 0x17c20000 0 0x1000>;
@@ -3389,49 +3389,49 @@ frame@17c21000 { 
				frame-number = <0>;

				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c21000 0 0x1000>,

				      <0 0x17c22000 0 0x1000>;

				reg = <0x17c21000 0x1000>,

				      <0x17c22000 0x1000>;

			};



			frame@17c23000 {

				frame-number = <1>;

				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c23000 0 0x1000>;

				reg = <0x17c23000 0x1000>;

				status = "disabled";

			};



			frame@17c25000 {

				frame-number = <2>;

				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c25000 0 0x1000>;

				reg = <0x17c25000 0x1000>;

				status = "disabled";

			};



			frame@17c27000 {

				frame-number = <3>;

				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c27000 0 0x1000>;

				reg = <0x17c27000 0x1000>;

				status = "disabled";

			};



			frame@17c29000 {

				frame-number = <4>;

				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c29000 0 0x1000>;

				reg = <0x17c29000 0x1000>;

				status = "disabled";

			};



			frame@17c2b000 {

				frame-number = <5>;

				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c2b000 0 0x1000>;

				reg = <0x17c2b000 0x1000>;

				status = "disabled";

			};



			frame@17c2d000 {

				frame-number = <6>;

				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c2d000 0 0x1000>;

				reg = <0x17c2d000 0x1000>;

				status = "disabled";

			};

		};

arch/arm64/boot/dts/qcom/sc7280.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -4898,9 +4898,9 @@ watchdog@17c10000 { 
		};



		timer@17c20000 {

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0 0x20000000>;

			compatible = "arm,armv7-timer-mem";

			reg = <0 0x17c20000 0 0x1000>;
@@ -4908,49 +4908,49 @@ frame@17c21000 { 
				frame-number = <0>;

				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c21000 0 0x1000>,

				      <0 0x17c22000 0 0x1000>;

				reg = <0x17c21000 0x1000>,

				      <0x17c22000 0x1000>;

			};



			frame@17c23000 {

				frame-number = <1>;

				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c23000 0 0x1000>;

				reg = <0x17c23000 0x1000>;

				status = "disabled";

			};



			frame@17c25000 {

				frame-number = <2>;

				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c25000 0 0x1000>;

				reg = <0x17c25000 0x1000>;

				status = "disabled";

			};



			frame@17c27000 {

				frame-number = <3>;

				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c27000 0 0x1000>;

				reg = <0x17c27000 0x1000>;

				status = "disabled";

			};



			frame@17c29000 {

				frame-number = <4>;

				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c29000 0 0x1000>;

				reg = <0x17c29000 0x1000>;

				status = "disabled";

			};



			frame@17c2b000 {

				frame-number = <5>;

				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c2b000 0 0x1000>;

				reg = <0x17c2b000 0x1000>;

				status = "disabled";

			};



			frame@17c2d000 {

				frame-number = <6>;

				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17c2d000 0 0x1000>;

				reg = <0x17c2d000 0x1000>;

				status = "disabled";

			};

		};

arch/arm64/boot/dts/qcom/sdm845.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -4943,9 +4943,9 @@ slimbam: dma-controller@17184000 { 
		};



		timer@17c90000 {

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0 0x20000000>;

			compatible = "arm,armv7-timer-mem";

			reg = <0 0x17c90000 0 0x1000>;
@@ -4953,49 +4953,49 @@ frame@17ca0000 { 
				frame-number = <0>;

				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17ca0000 0 0x1000>,

				      <0 0x17cb0000 0 0x1000>;

				reg = <0x17ca0000 0x1000>,

				      <0x17cb0000 0x1000>;

			};



			frame@17cc0000 {

				frame-number = <1>;

				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17cc0000 0 0x1000>;

				reg = <0x17cc0000 0x1000>;

				status = "disabled";

			};



			frame@17cd0000 {

				frame-number = <2>;

				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17cd0000 0 0x1000>;

				reg = <0x17cd0000 0x1000>;

				status = "disabled";

			};



			frame@17ce0000 {

				frame-number = <3>;

				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17ce0000 0 0x1000>;

				reg = <0x17ce0000 0x1000>;

				status = "disabled";

			};



			frame@17cf0000 {

				frame-number = <4>;

				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17cf0000 0 0x1000>;

				reg = <0x17cf0000 0x1000>;

				status = "disabled";

			};



			frame@17d00000 {

				frame-number = <5>;

				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17d00000 0 0x1000>;

				reg = <0x17d00000 0x1000>;

				status = "disabled";

			};



			frame@17d10000 {

				frame-number = <6>;

				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0 0x17d10000 0 0x1000>;

				reg = <0x17d10000 0x1000>;

				status = "disabled";

			};

		};

arch/arm64/boot/dts/qcom/sm6350.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -1304,57 +1304,57 @@ timer@17c20000 { 
			compatible = "arm,armv7-timer-mem";

			reg = <0x0 0x17c20000 0x0 0x1000>;

			clock-frequency = <19200000>;

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0 0x20000000>;



			frame@17c21000 {

				frame-number = <0>;

				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c21000 0x0 0x1000>,

				      <0x0 0x17c22000 0x0 0x1000>;

				reg = <0x17c21000 0x1000>,

				      <0x17c22000 0x1000>;

			};



			frame@17c23000 {

				frame-number = <1>;

				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c23000 0x0 0x1000>;

				reg = <0x17c23000 0x1000>;

				status = "disabled";

			};



			frame@17c25000 {

				frame-number = <2>;

				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c25000 0x0 0x1000>;

				reg = <0x17c25000 0x1000>;

				status = "disabled";

			};



			frame@17c27000 {

				frame-number = <3>;

				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c27000 0x0 0x1000>;

				reg = <0x17c27000 0x1000>;

				status = "disabled";

			};



			frame@17c29000 {

				frame-number = <4>;

				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c29000 0x0 0x1000>;

				reg = <0x17c29000 0x1000>;

				status = "disabled";

			};



			frame@17c2b000 {

				frame-number = <5>;

				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c2b000 0x0 0x1000>;

				reg = <0x17c2b000 0x1000>;

				status = "disabled";

			};



			frame@17c2d000 {

				frame-number = <6>;

				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x0 0x17c2d000 0x0 0x1000>;

				reg = <0x17c2d000 0x1000>;

				status = "disabled";

			};

		};