Commit 46f73c1c authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Neil Armstrong
Browse files

ARM: dts: meson8b: Add more L2 (PL310) cache properties 



Add more L2 cache properties which are used by the 3.10 vendor kernel
but have not made it upstream yet.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230114233455.2005047-3-martin.blumenstingl@googlemail.com


Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 12cdc236

arch/arm/boot/dts/meson8b.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -643,6 +643,9 @@ &L2 { 
	arm,filter-ranges = <0x100000 0xc0000000>;

	prefetch-data = <1>;

	prefetch-instr = <1>;

	arm,prefetch-offset = <7>;

	arm,double-linefill = <1>;

	arm,prefetch-drop = <1>;

	arm,shared-override;

};