Commit 48b4371b authored by Sean Nyekjaer's avatar Sean Nyekjaer Committed by Lee Jones
Browse files

mfd: stpmic1: Fixup main control register and bits naming

Fixup main control register and bits naming so the match the naming from
the datasheet.

https://www.st.com/resource/en/datasheet/stpmic1.pdf



Signed-off-by: default avatarSean Nyekjaer <sean@geanix.com>
Signed-off-by: default avatarLee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230602062426.3947116-1-sean@geanix.com
parent 2ce68cf1
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+2 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@

static const struct regmap_range stpmic1_readable_ranges[] = {
	regmap_reg_range(TURN_ON_SR, VERSION_SR),
	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	regmap_reg_range(MAIN_CR, LDO6_STDBY_CR),
	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
@@ -30,7 +30,7 @@ static const struct regmap_range stpmic1_readable_ranges[] = {
};

static const struct regmap_range stpmic1_writeable_ranges[] = {
	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	regmap_reg_range(MAIN_CR, LDO6_STDBY_CR),
	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
	regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
+6 −6
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@
#define RREQ_STATE_SR		0x5
#define VERSION_SR		0x6

#define SWOFF_PWRCTRL_CR	0x10
#define MAIN_CR			0x10
#define PADS_PULL_CR		0x11
#define BUCKS_PD_CR		0x12
#define LDO14_PD_CR		0x13
@@ -148,14 +148,14 @@
#define LDO_BYPASS_MASK			BIT(7)

/* Main PMIC Control Register
 * SWOFF_PWRCTRL_CR
 * MAIN_CR
 * Address : 0x10
 */
#define ICC_EVENT_ENABLED		BIT(4)
#define OCP_OFF_DBG			BIT(4)
#define PWRCTRL_POLARITY_HIGH		BIT(3)
#define PWRCTRL_PIN_VALID		BIT(2)
#define RESTART_REQUEST_ENABLED		BIT(1)
#define SOFTWARE_SWITCH_OFF_ENABLED	BIT(0)
#define PWRCTRL_ENABLE			BIT(2)
#define RESTART_REQUEST_ENABLE		BIT(1)
#define SOFTWARE_SWITCH_OFF		BIT(0)

/* Main PMIC PADS Control Register
 * PADS_PULL_CR