Commit 4a183020 authored by Sai Prakash Ranjan's avatar Sai Prakash Ranjan Committed by Bjorn Andersson
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arm64: dts: qcom: sdm845: Support ETMv4 power management



Add "arm,coresight-loses-context-with-cpu" property to coresight
ETM nodes to avoid failure of trace session because of losing
context on entering deep idle states.

Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/20200721071343.2898-1-saiprakash.ranjan@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 208921ba
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+8 −0
Original line number Diff line number Diff line
@@ -3016,6 +3016,7 @@ etm@7040000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3035,6 +3036,7 @@ etm@7140000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3054,6 +3056,7 @@ etm@7240000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3073,6 +3076,7 @@ etm@7340000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3092,6 +3096,7 @@ etm@7440000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3111,6 +3116,7 @@ etm@7540000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3130,6 +3136,7 @@ etm@7640000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {
@@ -3149,6 +3156,7 @@ etm@7740000 {

			clocks = <&aoss_qmp>;
			clock-names = "apb_pclk";
			arm,coresight-loses-context-with-cpu;

			out-ports {
				port {