Commit 4b28b76b authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: fix mpo blanking out on one of planes being set not visible 



Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 747be97f

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

+1 −2
Original line number Diff line number Diff line
@@ -403,8 +403,7 @@ void dce_mem_input_program_surface_config(struct mem_input *mi, 
	union plane_size *plane_size,

	enum dc_rotation_angle rotation,

	struct dc_plane_dcc_param *dcc,

	bool horizontal_mirror,

	bool visible)

	bool horizontal_mirror)

{

	REG_UPDATE(GRPH_ENABLE, GRPH_ENABLE, 1);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h

+1 −2
Original line number Diff line number Diff line
@@ -277,8 +277,7 @@ void dce_mem_input_program_surface_config(struct mem_input *mi, 
	union plane_size *plane_size,

	enum dc_rotation_angle rotation,

	struct dc_plane_dcc_param *dcc,

	bool horizontal_mirror,

	bool visible);

	bool horizontal_mirror);



void dce_mem_input_allocate_dmif(struct mem_input *mi,

	uint32_t h_total,

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+6 −4
Original line number Diff line number Diff line
@@ -1986,8 +1986,9 @@ static void set_plane_config( 
			&surface->public.plane_size,

			surface->public.rotation,

			NULL,

			false,

			pipe_ctx->surface->public.visible);

			false);

	if (mi->funcs->set_blank)

		mi->funcs->set_blank(mi, pipe_ctx->surface->public.visible);



	if (dc->public.config.gpu_vm_support)

		mi->funcs->mem_input_program_pte_vm(
@@ -2432,8 +2433,9 @@ static void dce110_program_front_end_for_pipe( 
			&surface->public.plane_size,

			surface->public.rotation,

			NULL,

			false,

			pipe_ctx->surface->public.visible);

			false);

	if (mi->funcs->set_blank)

		mi->funcs->set_blank(mi, pipe_ctx->surface->public.visible);



	if (dc->public.config.gpu_vm_support)

		mi->funcs->mem_input_program_pte_vm(

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

+1 −2
Original line number Diff line number Diff line
@@ -664,8 +664,7 @@ void dce110_mem_input_v_program_surface_config( 
	union plane_size *plane_size,

	enum dc_rotation_angle rotation,

	struct dc_plane_dcc_param *dcc,

	bool horizotal_mirror,

	bool visible)

	bool horizotal_mirror)

{

	struct dce110_mem_input *mem_input110 = TO_DCE110_MEM_INPUT(mem_input);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+35 −6
Original line number Diff line number Diff line
@@ -848,7 +848,7 @@ static void reset_front_end_for_pipe( 


	unlock_master_tg_and_wait(dc->ctx, pipe_ctx->tg->inst);



	pipe_ctx->mi->funcs->disable_request(pipe_ctx->mi);

	pipe_ctx->mi->funcs->set_blank(pipe_ctx->mi, true);



	wait_no_outstanding_request(dc->ctx, pipe_ctx->pipe_idx);
@@ -1513,6 +1513,35 @@ static void program_gamut_remap(struct pipe_ctx *pipe_ctx) 
	pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust);

}



static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)

{

	if (pipe_ctx->surface->public.visible)

		return true;

	if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))

		return true;

	return false;

}



static bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx)

{

	if (pipe_ctx->surface->public.visible)

		return true;

	if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe))

		return true;

	return false;

}



static bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx)

{

	if (pipe_ctx->surface->public.visible)

		return true;

	if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe))

		return true;

	if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))

		return true;

	return false;

}



static void update_dchubp_dpp(

	struct core_dc *dc,

	struct pipe_ctx *pipe_ctx,
@@ -1633,12 +1662,9 @@ static void update_dchubp_dpp( 
		&size,

		surface->public.rotation,

		&surface->public.dcc,

		surface->public.horizontal_mirror,

		surface->public.visible);



	/* Only support one plane for now. */

	pipe_ctx->tg->funcs->set_blank(pipe_ctx->tg, !surface->public.visible);

		surface->public.horizontal_mirror);



	mi->funcs->set_blank(mi, !is_pipe_tree_visible(pipe_ctx));

}



static void program_all_pipe_in_tree(
@@ -1669,10 +1695,13 @@ static void program_all_pipe_in_tree( 


		pipe_ctx->tg->funcs->program_global_sync(

				pipe_ctx->tg);

		pipe_ctx->tg->funcs->set_blank(pipe_ctx->tg, !is_pipe_tree_visible(pipe_ctx));







		update_dchubp_dpp(dc, pipe_ctx, context);



		/* Only support one plane for now. */

	}



	if (pipe_ctx->bottom_pipe != NULL)