Commit 4c33e517 authored by Vijendar Mukunda's avatar Vijendar Mukunda Committed by Alex Deucher
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drm/amdgpu: create I2S platform devices for Jadeite platform 



Jadeite platform uses I2S MICSP instance.
Create platform devices for DMA controller and I2S controller for
Jadeite platform.

Signed-off-by: default avatarVijendar Mukunda <Vijendar.Mukunda@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 49062ee3

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

+184 −109
Original line number Diff line number Diff line
@@ -262,8 +262,74 @@ static int acp_hw_init(void *handle) 
	adev->acp.acp_genpd->adev = adev;



	pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);

	dmi_check_system(acp_quirk_table);

	switch (acp_machine_id) {

	case ST_JADEITE:

	{

		adev->acp.acp_cell = kcalloc(2, sizeof(struct mfd_cell),

					     GFP_KERNEL);

		if (!adev->acp.acp_cell) {

			r = -ENOMEM;

			goto failure;

		}



		adev->acp.acp_res = kcalloc(3, sizeof(struct resource), GFP_KERNEL);

		if (!adev->acp.acp_res) {

			r = -ENOMEM;

			goto failure;

		}



	adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), GFP_KERNEL);

		i2s_pdata = kcalloc(1, sizeof(struct i2s_platform_data), GFP_KERNEL);

		if (!i2s_pdata) {

			r = -ENOMEM;

			goto failure;

		}



		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |

				      DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;

		i2s_pdata[0].cap = DWC_I2S_PLAY | DWC_I2S_RECORD;

		i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;

		i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;

		i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET;



		adev->acp.acp_res[0].name = "acp2x_dma";

		adev->acp.acp_res[0].flags = IORESOURCE_MEM;

		adev->acp.acp_res[0].start = acp_base;

		adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END;



		adev->acp.acp_res[1].name = "acp2x_dw_i2s_play_cap";

		adev->acp.acp_res[1].flags = IORESOURCE_MEM;

		adev->acp.acp_res[1].start = acp_base + ACP_I2S_CAP_REGS_START;

		adev->acp.acp_res[1].end = acp_base + ACP_I2S_CAP_REGS_END;



		adev->acp.acp_res[2].name = "acp2x_dma_irq";

		adev->acp.acp_res[2].flags = IORESOURCE_IRQ;

		adev->acp.acp_res[2].start = amdgpu_irq_create_mapping(adev, 162);

		adev->acp.acp_res[2].end = adev->acp.acp_res[2].start;



		adev->acp.acp_cell[0].name = "acp_audio_dma";

		adev->acp.acp_cell[0].num_resources = 3;

		adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0];

		adev->acp.acp_cell[0].platform_data = &adev->asic_type;

		adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type);



		adev->acp.acp_cell[1].name = "designware-i2s";

		adev->acp.acp_cell[1].num_resources = 1;

		adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1];

		adev->acp.acp_cell[1].platform_data = &i2s_pdata[0];

		adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data);

		r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, 2);

		if (r)

			goto failure;

		r = device_for_each_child(adev->acp.parent, &adev->acp.acp_genpd->gpd,

					  acp_genpd_add_device);

		if (r)

			goto failure;

		break;

	}

	default:

		adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell),

					     GFP_KERNEL);



		if (!adev->acp.acp_cell) {

			r = -ENOMEM;
@@ -324,6 +390,14 @@ static int acp_hw_init(void *handle) 
		i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET;

		i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET;



		i2s_pdata[3].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;

		switch (adev->asic_type) {

		case CHIP_STONEY:

			i2s_pdata[3].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;

			break;

		default:

			break;

		}

		adev->acp.acp_res[0].name = "acp2x_dma";

		adev->acp.acp_res[0].flags = IORESOURCE_MEM;

		adev->acp.acp_res[0].start = acp_base;
@@ -381,6 +455,7 @@ static int acp_hw_init(void *handle) 
					  acp_genpd_add_device);

		if (r)

			goto failure;

	}



	/* Assert Soft reset of ACP */

	val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);