Commit 4cd4beb9 authored by Conor Dooley's avatar Conor Dooley
Browse files

Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next 



Merge Hal's series adding support for the new StarFive JH7110 SoC.
There's a few bindings here for core components that were not picked up
by the various maintainers for the subsystems (previously Palmer would
pick these up via the RISC-V tree) & the first two commits in the branch
are shared with the clk tree, since the dts depends on defines in the
dt-binding headers.

This is based on -rc2, as the board does not actually boot on -rc1
due to the bug Linus introduced.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parents e77da13b 54baba33

.mailmap

+9 −1
Original line number Diff line number Diff line
@@ -136,6 +136,9 @@ Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com> 
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>

Evgeniy Polyakov <johnpol@2ka.mipt.ru>

Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>

Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>

Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@intel.com>

Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>

Felipe W Damasio <felipewd@terra.com.br>

Felix Kuhling <fxkuehl@gmx.de>

Felix Moeller <felix@derklecks.de>
@@ -306,6 +309,8 @@ Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@osg.samsung.com> 
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@redhat.com>

Mauro Carvalho Chehab <mchehab@kernel.org> <m.chehab@samsung.com>

Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@s-opensource.com>

Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@mellanox.com>

Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@nvidia.com>

Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>

Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>

Mayuresh Janorkar <mayur@ti.com>
@@ -411,7 +416,10 @@ Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com> 
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>

Simon Kelley <simon@thekelleys.org.uk>

Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>

Stephen Hemminger <shemminger@osdl.org>

Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>

Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org>

Stephen Hemminger <stephen@networkplumber.org> <sthemmin@microsoft.com>

Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com>

Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>

Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>

Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>

Documentation/ABI/stable/sysfs-block

+9 −0
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@@ -705,6 +705,15 @@ Description: 
		zoned will report "none".





What:		/sys/block/<disk>/hidden

Date:		March 2023

Contact:	linux-block@vger.kernel.org

Description:

		[RO] the block device is hidden. it doesn’t produce events, and

		can’t be opened from userspace or using blkdev_get*.

		Used for the underlying components of multipath devices.





What:		/sys/block/<disk>/stat

Date:		February 2008

Contact:	Jerome Marchand <jmarchan@redhat.com>

Documentation/bpf/bpf_devel_QA.rst

+5 −9
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@@ -7,8 +7,8 @@ workflows related to reporting bugs, submitting patches, and queueing 
patches for stable kernels.



For general information about submitting patches, please refer to

`Documentation/process/`_. This document only describes additional specifics

related to BPF.

Documentation/process/submitting-patches.rst. This document only describes

additional specifics related to BPF.



.. contents::

    :local:
@@ -461,15 +461,15 @@ needed:: 


  $ sudo make run_tests



See the kernels selftest `Documentation/dev-tools/kselftest.rst`_

document for further documentation.

See :doc:`kernel selftest documentation </dev-tools/kselftest>`

for details.



To maximize the number of tests passing, the .config of the kernel

under test should match the config file fragment in

tools/testing/selftests/bpf as closely as possible.



Finally to ensure support for latest BPF Type Format features -

discussed in `Documentation/bpf/btf.rst`_ - pahole version 1.16

discussed in Documentation/bpf/btf.rst - pahole version 1.16

is required for kernels built with CONFIG_DEBUG_INFO_BTF=y.

pahole is delivered in the dwarves package or can be built

from source at
@@ -684,12 +684,8 @@ when: 




.. Links

.. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/

.. _netdev-FAQ: Documentation/process/maintainer-netdev.rst

.. _selftests:

   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/

.. _Documentation/dev-tools/kselftest.rst:

   https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html

.. _Documentation/bpf/btf.rst: btf.rst



Happy BPF hacking!

Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: StarFive JH7110 Always-On Clock and Reset Generator



maintainers:

  - Emil Renner Berthing <kernel@esmil.dk>



properties:

  compatible:

    const: starfive,jh7110-aoncrg



  reg:

    maxItems: 1



  clocks:

    oneOf:

      - items:

          - description: Main Oscillator (24 MHz)

          - description: GMAC0 RMII reference or GMAC0 RGMII RX

          - description: STG AXI/AHB

          - description: APB Bus

          - description: GMAC0 GTX



      - items:

          - description: Main Oscillator (24 MHz)

          - description: GMAC0 RMII reference or GMAC0 RGMII RX

          - description: STG AXI/AHB or GMAC0 RGMII RX

          - description: APB Bus or STG AXI/AHB

          - description: GMAC0 GTX or APB Bus

          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX



      - items:

          - description: Main Oscillator (24 MHz)

          - description: GMAC0 RMII reference

          - description: GMAC0 RGMII RX

          - description: STG AXI/AHB

          - description: APB Bus

          - description: GMAC0 GTX

          - description: RTC Oscillator (32.768 kHz)



  clock-names:

    oneOf:

      - minItems: 5

        items:

          - const: osc

          - enum:

              - gmac0_rmii_refin

              - gmac0_rgmii_rxin

          - const: stg_axiahb

          - const: apb_bus

          - const: gmac0_gtxclk

          - const: rtc_osc



      - minItems: 6

        items:

          - const: osc

          - const: gmac0_rmii_refin

          - const: gmac0_rgmii_rxin

          - const: stg_axiahb

          - const: apb_bus

          - const: gmac0_gtxclk

          - const: rtc_osc



  '#clock-cells':

    const: 1

    description:

      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.



  '#reset-cells':

    const: 1

    description:

      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'

  - '#reset-cells'



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/starfive,jh7110-crg.h>



    clock-controller@17000000 {

        compatible = "starfive,jh7110-aoncrg";

        reg = <0x17000000 0x10000>;

        clocks = <&osc>, <&gmac0_rmii_refin>,

                 <&gmac0_rgmii_rxin>,

                 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,

                 <&syscrg JH7110_SYSCLK_APB_BUS>,

                 <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,

                 <&rtc_osc>;

        clock-names = "osc", "gmac0_rmii_refin",

                      "gmac0_rgmii_rxin", "stg_axiahb",

                      "apb_bus", "gmac0_gtxclk",

                      "rtc_osc";

        #clock-cells = <1>;

        #reset-cells = <1>;

    };

Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: StarFive JH7110 System Clock and Reset Generator



maintainers:

  - Emil Renner Berthing <kernel@esmil.dk>



properties:

  compatible:

    const: starfive,jh7110-syscrg



  reg:

    maxItems: 1



  clocks:

    oneOf:

      - items:

          - description: Main Oscillator (24 MHz)

          - description: GMAC1 RMII reference or GMAC1 RGMII RX

          - description: External I2S TX bit clock

          - description: External I2S TX left/right channel clock

          - description: External I2S RX bit clock

          - description: External I2S RX left/right channel clock

          - description: External TDM clock

          - description: External audio master clock



      - items:

          - description: Main Oscillator (24 MHz)

          - description: GMAC1 RMII reference

          - description: GMAC1 RGMII RX

          - description: External I2S TX bit clock

          - description: External I2S TX left/right channel clock

          - description: External I2S RX bit clock

          - description: External I2S RX left/right channel clock

          - description: External TDM clock

          - description: External audio master clock



  clock-names:

    oneOf:

      - items:

          - const: osc

          - enum:

              - gmac1_rmii_refin

              - gmac1_rgmii_rxin

          - const: i2stx_bclk_ext

          - const: i2stx_lrck_ext

          - const: i2srx_bclk_ext

          - const: i2srx_lrck_ext

          - const: tdm_ext

          - const: mclk_ext



      - items:

          - const: osc

          - const: gmac1_rmii_refin

          - const: gmac1_rgmii_rxin

          - const: i2stx_bclk_ext

          - const: i2stx_lrck_ext

          - const: i2srx_bclk_ext

          - const: i2srx_lrck_ext

          - const: tdm_ext

          - const: mclk_ext



  '#clock-cells':

    const: 1

    description:

      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.



  '#reset-cells':

    const: 1

    description:

      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'

  - '#reset-cells'



additionalProperties: false



examples:

  - |

    clock-controller@13020000 {

        compatible = "starfive,jh7110-syscrg";

        reg = <0x13020000 0x10000>;

        clocks = <&osc>, <&gmac1_rmii_refin>,

                 <&gmac1_rgmii_rxin>,

                 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,

                 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,

                 <&tdm_ext>, <&mclk_ext>;

        clock-names = "osc", "gmac1_rmii_refin",

                      "gmac1_rgmii_rxin",

                      "i2stx_bclk_ext", "i2stx_lrck_ext",

                      "i2srx_bclk_ext", "i2srx_lrck_ext",

                      "tdm_ext", "mclk_ext";

        #clock-cells = <1>;

        #reset-cells = <1>;

    };