Loading drivers/gpio/gpio-stmpe.c +12 −12 Original line number Original line Diff line number Diff line Loading @@ -43,7 +43,7 @@ static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; ret = stmpe_reg_read(stmpe, reg); ret = stmpe_reg_read(stmpe, reg); Loading @@ -59,7 +59,7 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; u8 reg = stmpe->regs[which + (offset / 8)]; u8 reg = stmpe->regs[which + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); /* /* * Some variants have single register for gpio set/clear functionality. * Some variants have single register for gpio set/clear functionality. Loading @@ -77,7 +77,7 @@ static int stmpe_gpio_get_direction(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; ret = stmpe_reg_read(stmpe, reg); ret = stmpe_reg_read(stmpe, reg); Loading @@ -93,7 +93,7 @@ static int stmpe_gpio_direction_output(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); stmpe_gpio_set(chip, offset, val); stmpe_gpio_set(chip, offset, val); Loading @@ -106,7 +106,7 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); return stmpe_set_bits(stmpe, reg, mask, 0); return stmpe_set_bits(stmpe, reg, mask, 0); } } Loading @@ -116,10 +116,10 @@ static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; if (stmpe_gpio->norequest_mask & (1 << offset)) if (stmpe_gpio->norequest_mask & BIT(offset)) return -EINVAL; return -EINVAL; return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); return stmpe_set_altfunc(stmpe, BIT(offset), STMPE_BLOCK_GPIO); } } static const struct gpio_chip template_chip = { static const struct gpio_chip template_chip = { Loading @@ -140,7 +140,7 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) return -EINVAL; return -EINVAL; Loading Loading @@ -218,7 +218,7 @@ static void stmpe_gpio_irq_mask(struct irq_data *d) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; } } Loading @@ -230,7 +230,7 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d) struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); stmpe_gpio->regs[REG_IE][regoffset] |= mask; stmpe_gpio->regs[REG_IE][regoffset] |= mask; Loading @@ -254,7 +254,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, bool val = !!stmpe_gpio_get(gc, offset); bool val = !!stmpe_gpio_get(gc, offset); u8 bank = offset / 8; u8 bank = offset / 8; u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; u8 dir; u8 dir; Loading Loading @@ -401,7 +401,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) line); line); handle_nested_irq(child_irq); handle_nested_irq(child_irq); stat &= ~(1 << bit); stat &= ~BIT(bit); } } /* /* Loading Loading
drivers/gpio/gpio-stmpe.c +12 −12 Original line number Original line Diff line number Diff line Loading @@ -43,7 +43,7 @@ static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; ret = stmpe_reg_read(stmpe, reg); ret = stmpe_reg_read(stmpe, reg); Loading @@ -59,7 +59,7 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; u8 reg = stmpe->regs[which + (offset / 8)]; u8 reg = stmpe->regs[which + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); /* /* * Some variants have single register for gpio set/clear functionality. * Some variants have single register for gpio set/clear functionality. Loading @@ -77,7 +77,7 @@ static int stmpe_gpio_get_direction(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; ret = stmpe_reg_read(stmpe, reg); ret = stmpe_reg_read(stmpe, reg); Loading @@ -93,7 +93,7 @@ static int stmpe_gpio_direction_output(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); stmpe_gpio_set(chip, offset, val); stmpe_gpio_set(chip, offset, val); Loading @@ -106,7 +106,7 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip, struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); return stmpe_set_bits(stmpe, reg, mask, 0); return stmpe_set_bits(stmpe, reg, mask, 0); } } Loading @@ -116,10 +116,10 @@ static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; if (stmpe_gpio->norequest_mask & (1 << offset)) if (stmpe_gpio->norequest_mask & BIT(offset)) return -EINVAL; return -EINVAL; return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); return stmpe_set_altfunc(stmpe, BIT(offset), STMPE_BLOCK_GPIO); } } static const struct gpio_chip template_chip = { static const struct gpio_chip template_chip = { Loading @@ -140,7 +140,7 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) return -EINVAL; return -EINVAL; Loading Loading @@ -218,7 +218,7 @@ static void stmpe_gpio_irq_mask(struct irq_data *d) struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; } } Loading @@ -230,7 +230,7 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d) struct stmpe *stmpe = stmpe_gpio->stmpe; struct stmpe *stmpe = stmpe_gpio->stmpe; int offset = d->hwirq; int offset = d->hwirq; int regoffset = offset / 8; int regoffset = offset / 8; int mask = 1 << (offset % 8); int mask = BIT(offset % 8); stmpe_gpio->regs[REG_IE][regoffset] |= mask; stmpe_gpio->regs[REG_IE][regoffset] |= mask; Loading @@ -254,7 +254,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, bool val = !!stmpe_gpio_get(gc, offset); bool val = !!stmpe_gpio_get(gc, offset); u8 bank = offset / 8; u8 bank = offset / 8; u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; u8 mask = 1 << (offset % 8); u8 mask = BIT(offset % 8); int ret; int ret; u8 dir; u8 dir; Loading Loading @@ -401,7 +401,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) line); line); handle_nested_irq(child_irq); handle_nested_irq(child_irq); stat &= ~(1 << bit); stat &= ~BIT(bit); } } /* /* Loading