Unverified Commit 4e71d926 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Mark Brown
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spi: rspi: Increase bit rate range for RSPI on SH 



Increase bit rate range for RSPI on legacy SH by making use of the Bit
Rate Frequency Division Setting field in Command Registers, just like is
already done on RZ/A.  This decreases the lower limit by a factor of 8.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819125904.20938-5-geert+renesas@glider.be


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent feace902

drivers/spi/spi-rspi.c

+18 −17
Original line number Diff line number Diff line
@@ -248,19 +248,32 @@ struct spi_ops { 
	u8 num_hw_ss;

};



static void rspi_set_rate(struct rspi_data *rspi)

{

	unsigned long clksrc;

	int brdv = 0, spbr;



	clksrc = clk_get_rate(rspi->clk);

	spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1;

	while (spbr > 255 && brdv < 3) {

		brdv++;

		spbr = DIV_ROUND_UP(spbr + 1, 2) - 1;

	}



	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);

	rspi->spcmd |= SPCMD_BRDV(brdv);

}



/*

 * functions for RSPI on legacy SH

 */

static int rspi_set_config_register(struct rspi_data *rspi, int access_size)

{

	int spbr;



	/* Sets output mode, MOSI signal, and (optionally) loopback */

	rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);



	/* Sets transfer bit rate */

	spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz) - 1;

	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);

	rspi_set_rate(rspi);



	/* Disable dummy transmission, set 16-bit word access, 1 frame */

	rspi_write8(rspi, 0, RSPI_SPDCR);
@@ -290,23 +303,11 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size) 
 */

static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)

{

	int spbr;

	int brdv = 0;

	unsigned long clksrc;



	/* Sets output mode, MOSI signal, and (optionally) loopback */

	rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);



	clksrc = clk_get_rate(rspi->clk);

	spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1;

	while (spbr > 255 && brdv < 3) {

		brdv++;

		spbr = DIV_ROUND_UP(spbr + 1, 2) - 1;

	}



	/* Sets transfer bit rate */

	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);

	rspi->spcmd |= SPCMD_BRDV(brdv);

	rspi_set_rate(rspi);



	/* Disable dummy transmission, set byte access */

	rspi_write8(rspi, SPDCR_SPLBYTE, RSPI_SPDCR);