Commit 4ea6aa89 authored by Nancy.Lin's avatar Nancy.Lin Committed by Matthias Brugger
Browse files

soc: mediatek: add mtk-mutex support for mt8195 vdosys1 



Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements
which include MDP_RDMA0~7, MERGE0~3, and ETHDR.

Signed-off-by: default avatarNancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarCK Hu <ck.hu@mediatek.com>
Tested-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: default avatarBo-Chen Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230113104434.28023-12-nancy.lin@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 8150a0e3

drivers/soc/mediatek/mtk-mutex.c

+33 −0
Original line number Diff line number Diff line
@@ -145,6 +145,24 @@ 
#define MT8195_MUTEX_MOD_DISP_DP_INTF0		21

#define MT8195_MUTEX_MOD_DISP_PWM0		27



#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0	0

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1	1

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2	2

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3	3

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4	4

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5	5

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6	6

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7	7

#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0	8

#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1	9

#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2	10

#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3	11

#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4	12

#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER	18

#define MT8195_MUTEX_MOD_DISP1_DPI0		25

#define MT8195_MUTEX_MOD_DISP1_DPI1		26

#define MT8195_MUTEX_MOD_DISP1_DP_INTF0		27



#define MT8365_MUTEX_MOD_DISP_OVL0		7

#define MT8365_MUTEX_MOD_DISP_OVL0_2L		8

#define MT8365_MUTEX_MOD_DISP_RDMA0		9
@@ -408,6 +426,21 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { 
	[DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0,

	[DDP_COMPONENT_PWM0] = MT8195_MUTEX_MOD_DISP_PWM0,

	[DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0,

	[DDP_COMPONENT_MDP_RDMA0] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA0,

	[DDP_COMPONENT_MDP_RDMA1] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA1,

	[DDP_COMPONENT_MDP_RDMA2] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA2,

	[DDP_COMPONENT_MDP_RDMA3] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA3,

	[DDP_COMPONENT_MDP_RDMA4] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA4,

	[DDP_COMPONENT_MDP_RDMA5] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA5,

	[DDP_COMPONENT_MDP_RDMA6] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA6,

	[DDP_COMPONENT_MDP_RDMA7] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA7,

	[DDP_COMPONENT_MERGE1] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE0,

	[DDP_COMPONENT_MERGE2] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE1,

	[DDP_COMPONENT_MERGE3] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE2,

	[DDP_COMPONENT_MERGE4] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE3,

	[DDP_COMPONENT_ETHDR_MIXER] = MT8195_MUTEX_MOD_DISP1_DISP_MIXER,

	[DDP_COMPONENT_MERGE5] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE4,

	[DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0,

};



static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = {