Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +0 −2 Original line number Diff line number Diff line Loading @@ -172,7 +172,6 @@ void gf100_gr_init_400054(struct gf100_gr *); void gf117_gr_init_zcull(struct gf100_gr *); int gk104_gr_init(struct gf100_gr *); void gk104_gr_init_vsc_stream_master(struct gf100_gr *); void gk104_gr_init_rop_active_fbps(struct gf100_gr *); void gk104_gr_init_ppc_exceptions(struct gf100_gr *); Loading @@ -190,7 +189,6 @@ int gm200_gr_rops(struct gf100_gr *); void gm200_gr_init_num_active_ltcs(struct gf100_gr *); void gm200_gr_init_ds_hww_esr_2(struct gf100_gr *); int gp100_gr_init(struct gf100_gr *); void gp100_gr_init_rop_active_fbps(struct gf100_gr *); void gp100_gr_init_fecs_exceptions(struct gf100_gr *); void gp100_gr_init_shader_exceptions(struct gf100_gr *, int, int); Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c +1 −77 Original line number Diff line number Diff line Loading @@ -426,82 +426,6 @@ gk104_gr_init_vsc_stream_master(struct gf100_gr *gr) nvkm_wr32(device, GPC_UNIT(0, 0x3018), 0x00000001); } int gk104_gr_init(struct gf100_gr *gr) { struct nvkm_device *device = gr->base.engine.subdev.device; int gpc, tpc, rop; gr->func->init_gpc_mmu(gr); gf100_gr_mmio(gr, gr->func->mmio); if (gr->func->clkgate_pack) nvkm_therm_clkgate_init(gr->base.engine.subdev.device->therm, gr->func->clkgate_pack); gr->func->init_vsc_stream_master(gr); gr->func->init_zcull(gr); gr->func->init_num_active_ltcs(gr); gr->func->init_rop_active_fbps(gr); nvkm_wr32(device, 0x400500, 0x00010001); nvkm_wr32(device, 0x400100, 0xffffffff); nvkm_wr32(device, 0x40013c, 0xffffffff); nvkm_wr32(device, 0x400124, 0x00000002); gr->func->init_fecs_exceptions(gr); nvkm_wr32(device, 0x404000, 0xc0000000); nvkm_wr32(device, 0x404600, 0xc0000000); nvkm_wr32(device, 0x408030, 0xc0000000); nvkm_wr32(device, 0x404490, 0xc0000000); nvkm_wr32(device, 0x406018, 0xc0000000); gr->func->init_sked_hww_esr(gr); nvkm_wr32(device, 0x405840, 0xc0000000); nvkm_wr32(device, 0x405844, 0x00ffffff); gr->func->init_419cc0(gr); gr->func->init_419eb4(gr); gr->func->init_ppc_exceptions(gr); for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000); for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff); nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff); gr->func->init_tex_hww_esr(gr, gpc, tpc); nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000); gr->func->init_shader_exceptions(gr, gpc, tpc); } nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff); nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff); } for (rop = 0; rop < gr->rop_nr; rop++) { nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000); nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000); nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff); nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff); } nvkm_wr32(device, 0x400108, 0xffffffff); nvkm_wr32(device, 0x400138, 0xffffffff); nvkm_wr32(device, 0x400118, 0xffffffff); nvkm_wr32(device, 0x400130, 0xffffffff); nvkm_wr32(device, 0x40011c, 0xffffffff); nvkm_wr32(device, 0x400134, 0xffffffff); gr->func->init_400054(gr); gf100_gr_zbc_init(gr); return gf100_gr_init_ctxctl(gr); } #include "fuc/hubgk104.fuc3.h" static struct gf100_gr_ucode Loading @@ -524,7 +448,7 @@ gk104_gr_gpccs_ucode = { static const struct gf100_gr_func gk104_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c +1 −1 Original line number Diff line number Diff line Loading @@ -350,7 +350,7 @@ gk110_gr_init_419eb4(struct gf100_gr *gr) static const struct gf100_gr_func gk110_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c +1 −1 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ gk110b_gr_pack_mmio[] = { static const struct gf100_gr_func gk110b_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c +1 −1 Original line number Diff line number Diff line Loading @@ -161,7 +161,7 @@ gk208_gr_gpccs_ucode = { static const struct gf100_gr_func gk208_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +0 −2 Original line number Diff line number Diff line Loading @@ -172,7 +172,6 @@ void gf100_gr_init_400054(struct gf100_gr *); void gf117_gr_init_zcull(struct gf100_gr *); int gk104_gr_init(struct gf100_gr *); void gk104_gr_init_vsc_stream_master(struct gf100_gr *); void gk104_gr_init_rop_active_fbps(struct gf100_gr *); void gk104_gr_init_ppc_exceptions(struct gf100_gr *); Loading @@ -190,7 +189,6 @@ int gm200_gr_rops(struct gf100_gr *); void gm200_gr_init_num_active_ltcs(struct gf100_gr *); void gm200_gr_init_ds_hww_esr_2(struct gf100_gr *); int gp100_gr_init(struct gf100_gr *); void gp100_gr_init_rop_active_fbps(struct gf100_gr *); void gp100_gr_init_fecs_exceptions(struct gf100_gr *); void gp100_gr_init_shader_exceptions(struct gf100_gr *, int, int); Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c +1 −77 Original line number Diff line number Diff line Loading @@ -426,82 +426,6 @@ gk104_gr_init_vsc_stream_master(struct gf100_gr *gr) nvkm_wr32(device, GPC_UNIT(0, 0x3018), 0x00000001); } int gk104_gr_init(struct gf100_gr *gr) { struct nvkm_device *device = gr->base.engine.subdev.device; int gpc, tpc, rop; gr->func->init_gpc_mmu(gr); gf100_gr_mmio(gr, gr->func->mmio); if (gr->func->clkgate_pack) nvkm_therm_clkgate_init(gr->base.engine.subdev.device->therm, gr->func->clkgate_pack); gr->func->init_vsc_stream_master(gr); gr->func->init_zcull(gr); gr->func->init_num_active_ltcs(gr); gr->func->init_rop_active_fbps(gr); nvkm_wr32(device, 0x400500, 0x00010001); nvkm_wr32(device, 0x400100, 0xffffffff); nvkm_wr32(device, 0x40013c, 0xffffffff); nvkm_wr32(device, 0x400124, 0x00000002); gr->func->init_fecs_exceptions(gr); nvkm_wr32(device, 0x404000, 0xc0000000); nvkm_wr32(device, 0x404600, 0xc0000000); nvkm_wr32(device, 0x408030, 0xc0000000); nvkm_wr32(device, 0x404490, 0xc0000000); nvkm_wr32(device, 0x406018, 0xc0000000); gr->func->init_sked_hww_esr(gr); nvkm_wr32(device, 0x405840, 0xc0000000); nvkm_wr32(device, 0x405844, 0x00ffffff); gr->func->init_419cc0(gr); gr->func->init_419eb4(gr); gr->func->init_ppc_exceptions(gr); for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000); nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000); for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff); nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff); gr->func->init_tex_hww_esr(gr, gpc, tpc); nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000); gr->func->init_shader_exceptions(gr, gpc, tpc); } nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff); nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff); } for (rop = 0; rop < gr->rop_nr; rop++) { nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0x40000000); nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0x40000000); nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff); nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff); } nvkm_wr32(device, 0x400108, 0xffffffff); nvkm_wr32(device, 0x400138, 0xffffffff); nvkm_wr32(device, 0x400118, 0xffffffff); nvkm_wr32(device, 0x400130, 0xffffffff); nvkm_wr32(device, 0x40011c, 0xffffffff); nvkm_wr32(device, 0x400134, 0xffffffff); gr->func->init_400054(gr); gf100_gr_zbc_init(gr); return gf100_gr_init_ctxctl(gr); } #include "fuc/hubgk104.fuc3.h" static struct gf100_gr_ucode Loading @@ -524,7 +448,7 @@ gk104_gr_gpccs_ucode = { static const struct gf100_gr_func gk104_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c +1 −1 Original line number Diff line number Diff line Loading @@ -350,7 +350,7 @@ gk110_gr_init_419eb4(struct gf100_gr *gr) static const struct gf100_gr_func gk110_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c +1 −1 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ gk110b_gr_pack_mmio[] = { static const struct gf100_gr_func gk110b_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c +1 −1 Original line number Diff line number Diff line Loading @@ -161,7 +161,7 @@ gk208_gr_gpccs_ucode = { static const struct gf100_gr_func gk208_gr = { .init = gk104_gr_init, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, .init_zcull = gf117_gr_init_zcull, Loading