Commit 538f4bcd authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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arm64: dts: qcom: sm6350: Add TLMM block node 



Add TLMM pinctrl node to enable referencing the SoC pins in other nodes.

Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-6-konrad.dybcio@somainline.org
parent 30de1108

arch/arm64/boot/dts/qcom/sm6350.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -404,6 +404,25 @@ pdc: interrupt-controller@b220000 { 
			interrupt-controller;

		};



		tlmm: pinctrl@f100000 {

			compatible = "qcom,sm6350-tlmm";

			reg = <0 0x0f100000 0 0x300000>;

			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			gpio-ranges = <&tlmm 0 0 157>;

		};



		intc: interrupt-controller@17a00000 {

			compatible = "arm,gic-v3";

			#interrupt-cells = <3>;