Commit 548b2771 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: white-hawk: Add CAN-FD support 



Enable confirmed-working CAN-FD channels 0 and 1 on the White-Hawk
development board:
  - Channel 0 uses an NXP TJR1443AT CAN transceiver, which must be
    enabled through a GPIO,
  - Channels 1-7 use Microchip MCP2558FD-H/SN CAN transceivers (not
    mounted for channels 4-7), which do not need explicit description,
    but channels 2-3 do not seem to work.

Inspired by a patch in the BSP by Kazuya Mizuguch.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a19d0a70aacaf4c3517a226bf32ea49db3542da4.1674500205.git.geert+renesas@glider.be
parent 5056a0c7

arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts

+44 −0
Original line number Diff line number Diff line
@@ -13,6 +13,33 @@ 
/ {

	model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";

	compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";



	can_transceiver0: can-phy0 {

		compatible = "nxp,tjr1443";

		#phy-cells = <0>;

		enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;

		max-bitrate = <5000000>;

	};

};



&can_clk {

	clock-frequency = <40000000>;

};



&canfd {

	pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;

	pinctrl-names = "default";



	status = "okay";



	channel0 {

		status = "okay";

		phys = <&can_transceiver0>;

	};



	channel1 {

		status = "okay";

	};

};



&i2c0 {
@@ -23,3 +50,20 @@ eeprom@51 { 
		pagesize = <8>;

	};

};



&pfc {

	can_clk_pins: can-clk {

		groups = "can_clk";

		function = "can_clk";

	};



	canfd0_pins: canfd0 {

		groups = "canfd0_data";

		function = "canfd0";

	};



	canfd1_pins: canfd1 {

		groups = "canfd1_data";

		function = "canfd1";

	};

};