Commit 5495d163 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'intel-pinctrl-v5.20-1' of... 

Merge tag 'intel-pinctrl-v5.20-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v5.20-1

* Update MAINTAINERS to set the Intel pin control status to Supported
* Switch Intel pin control drivers to use struct pingroup

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Switch to to embedded struct pingroup

cherryview:
 -  Switch to to embedded struct pingroup

intel:
 -  Add Intel Meteor Lake pin controller support
 -  Drop no more used members of struct intel_pingroup
 -  Switch to to embedded struct pingroup
 -  Embed struct pingroup into struct intel_pingroup

lynxpoint:
 -  Switch to to embedded struct pingroup

MAINTAINERS:
 -  Update Intel pin control to Supported

Merge branch 'ib-v5.20-amd-pinctrl':
 - Merge branch 'ib-v5.20-amd-pinctrl'

merrifield:
 -  Switch to to embedded struct pingroup
parents 7542766e 25097de7

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -15731,7 +15731,7 @@ F: drivers/pinctrl/freescale/ 
PIN CONTROLLER - INTEL

M:	Mika Westerberg <mika.westerberg@linux.intel.com>

M:	Andy Shevchenko <andy@kernel.org>

S:	Maintained

S:	Supported

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git

F:	drivers/pinctrl/intel/


































drivers/pinctrl/intel/Kconfig



+8
−0






























Original line number
Diff line number
Diff line







@@ -151,6 +151,14 @@ config PINCTRL_LEWISBURG







	  This pinctrl driver provides an interface that allows configuring









	  of Intel Lewisburg pins and using them as GPIOs.



















config PINCTRL_METEORLAKE









	tristate "Intel Meteor Lake pinctrl and GPIO driver"









	depends on ACPI









	select PINCTRL_INTEL









	help









	  This pinctrl driver provides an interface that allows configuring









	  of Intel Meteor Lake pins and using them as GPIOs.



















config PINCTRL_SUNRISEPOINT









	tristate "Intel Sunrisepoint pinctrl and GPIO driver"









	depends on ACPI


































drivers/pinctrl/intel/Makefile



+1
−0






























Original line number
Diff line number
Diff line







@@ -18,5 +18,6 @@ obj-$(CONFIG_PINCTRL_ICELAKE)		+= pinctrl-icelake.o







obj-$(CONFIG_PINCTRL_JASPERLAKE)	+= pinctrl-jasperlake.o









obj-$(CONFIG_PINCTRL_LAKEFIELD)		+= pinctrl-lakefield.o









obj-$(CONFIG_PINCTRL_LEWISBURG)		+= pinctrl-lewisburg.o









obj-$(CONFIG_PINCTRL_METEORLAKE)	+= pinctrl-meteorlake.o









obj-$(CONFIG_PINCTRL_SUNRISEPOINT)	+= pinctrl-sunrisepoint.o









obj-$(CONFIG_PINCTRL_TIGERLAKE)		+= pinctrl-tigerlake.o
























drivers/pinctrl/intel/pinctrl-baytrail.c



+9
−9






























Original line number
Diff line number
Diff line







@@ -603,7 +603,7 @@ static const char *byt_get_group_name(struct pinctrl_dev *pctldev,







{









	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);



















	return vg->soc->groups[selector].name;









	return vg->soc->groups[selector].grp.name;









}



















static int byt_get_group_pins(struct pinctrl_dev *pctldev,










@@ -613,8 +613,8 @@ static int byt_get_group_pins(struct pinctrl_dev *pctldev,







{









	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);



















	*pins		= vg->soc->groups[selector].pins;









	*num_pins	= vg->soc->groups[selector].npins;









	*pins		= vg->soc->groups[selector].grp.pins;









	*num_pins	= vg->soc->groups[selector].grp.npins;



















	return 0;









}










@@ -662,15 +662,15 @@ static void byt_set_group_simple_mux(struct intel_pinctrl *vg,

















	raw_spin_lock_irqsave(&byt_lock, flags);



















	for (i = 0; i < group.npins; i++) {









	for (i = 0; i < group.grp.npins; i++) {









		void __iomem *padcfg0;









		u32 value;



















		padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG);









		padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG);









		if (!padcfg0) {









			dev_warn(vg->dev,









				 "Group %s, pin %i not muxed (no padcfg0)\n",









				 group.name, i);









				 group.grp.name, i);









			continue;









		}




















@@ -692,15 +692,15 @@ static void byt_set_group_mixed_mux(struct intel_pinctrl *vg,

















	raw_spin_lock_irqsave(&byt_lock, flags);



















	for (i = 0; i < group.npins; i++) {









	for (i = 0; i < group.grp.npins; i++) {









		void __iomem *padcfg0;









		u32 value;



















		padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG);









		padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG);









		if (!padcfg0) {









			dev_warn(vg->dev,









				 "Group %s, pin %i not muxed (no padcfg0)\n",









				 group.name, i);









				 group.grp.name, i);









			continue;









		}












































drivers/pinctrl/intel/pinctrl-cherryview.c



+8
−8






























Original line number
Diff line number
Diff line







@@ -627,7 +627,7 @@ static const char *chv_get_group_name(struct pinctrl_dev *pctldev,







{









	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);



















	return pctrl->soc->groups[group].name;









	return pctrl->soc->groups[group].grp.name;









}



















static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,










@@ -635,8 +635,8 @@ static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,







{









	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);



















	*pins = pctrl->soc->groups[group].pins;









	*npins = pctrl->soc->groups[group].npins;









	*pins = pctrl->soc->groups[group].grp.pins;









	*npins = pctrl->soc->groups[group].grp.npins;









	return 0;









}




















@@ -721,16 +721,16 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev,







	raw_spin_lock_irqsave(&chv_lock, flags);



















	/* Check first that the pad is not locked */









	for (i = 0; i < grp->npins; i++) {









		if (chv_pad_locked(pctrl, grp->pins[i])) {









	for (i = 0; i < grp->grp.npins; i++) {









		if (chv_pad_locked(pctrl, grp->grp.pins[i])) {









			raw_spin_unlock_irqrestore(&chv_lock, flags);









			dev_warn(dev, "unable to set mode for locked pin %u\n", grp->pins[i]);









			dev_warn(dev, "unable to set mode for locked pin %u\n", grp->grp.pins[i]);









			return -EBUSY;









		}









	}



















	for (i = 0; i < grp->npins; i++) {









		int pin = grp->pins[i];









	for (i = 0; i < grp->grp.npins; i++) {









		int pin = grp->grp.pins[i];









		unsigned int mode;









		bool invert_oe;









		u32 value;