Commit 54f5de6f authored by Ian Rogers's avatar Ian Rogers Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events intel: Update sapphirerapids to v1.12 

Summary from https://github.com/intel/perfmon/pull/68


 - Numerous uncore event additions and changes.
 - Description updates for core events XQ.FULL_CYCLES and MISC2_RETIRED.LFENCE.
 - Update ARITH.IDIV_ACTIVE counter mask.

This change also gets rid of uncore-other as a topic, derived from the
file name, breaking it apart in to more specific topics.

Signed-off-by: default avatarIan Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: http://lore.kernel.org/lkml/20230413132949.3487664-2-irogers@google.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 4453deac

tools/perf/pmu-events/arch/x86/mapfile.csv

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ GenuineIntel-6-A[AC],v1.01,meteorlake,core 
GenuineIntel-6-1[AEF],v3,nehalemep,core

GenuineIntel-6-2E,v3,nehalemex,core

GenuineIntel-6-2A,v19,sandybridge,core

GenuineIntel-6-(8F|CF),v1.11,sapphirerapids,core

GenuineIntel-6-(8F|CF),v1.12,sapphirerapids,core

GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core

GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v55,skylake,core

GenuineIntel-6-55-[01234],v1.29,skylakex,core

tools/perf/pmu-events/arch/x86/sapphirerapids/other.json

+2 −1
Original line number Diff line number Diff line
@@ -331,10 +331,11 @@ 
        "UMask": "0x7"

    },

    {

        "BriefDescription": "XQ.FULL_CYCLES",

        "BriefDescription": "Cycles the uncore cannot take further requests",

        "CounterMask": "1",

        "EventCode": "0x2d",

        "EventName": "XQ.FULL_CYCLES",

        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",

        "SampleAfterValue": "1000003",

        "UMask": "0x1"

    }

tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json

+3 −1
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 
    },

    {

        "BriefDescription": "This event counts the cycles the integer divider is busy.",

        "CounterMask": "1",

        "EventCode": "0xb0",

        "EventName": "ARITH.IDIV_ACTIVE",

        "SampleAfterValue": "1000003",
@@ -655,9 +656,10 @@ 
        "UMask": "0x4"

    },

    {

        "BriefDescription": "MISC2_RETIRED.LFENCE",

        "BriefDescription": "LFENCE instructions retired",

        "EventCode": "0xe0",

        "EventName": "MISC2_RETIRED.LFENCE",

        "PublicDescription": "number of LFENCE retired instructions",

        "SampleAfterValue": "400009",

        "UMask": "0x20"

    },

tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json

0 → 100644
+450 −0
Original line number Diff line number Diff line 
[

    {

        "BriefDescription": "Counts the number of lfclk ticks",

        "EventCode": "0x01",

        "EventName": "UNC_CXLCM_CLOCKTICKS",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Rxx AGF 0",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_DATA",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Req AGF0",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ0",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Rsp AGF",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ1",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Data AGF",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP0",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Rsp AGF",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP1",

        "PerPkg": "1",

        "UMask": "0x40",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Req AGF 1",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_DATA",

        "PerPkg": "1",

        "UMask": "0x20",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Data AGF",

        "EventCode": "0x43",

        "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_REQ",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with AK set",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.AK_HDR",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with BE set",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.BE_HDR",

        "PerPkg": "1",

        "UMask": "0x20",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of control flits received",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.CTRL",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Headerless flits received",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.NO_HDR",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of protocol flits received",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.PROT",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with SZ set",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.SZ_HDR",

        "PerPkg": "1",

        "UMask": "0x40",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of flits received",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.VALID",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of valid messages in the flit",

        "EventCode": "0x4b",

        "EventName": "UNC_CXLCM_RxC_FLITS.VALID_MSG",

        "PerPkg": "1",

        "UMask": "0x80",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of CRC errors detected",

        "EventCode": "0x40",

        "EventName": "UNC_CXLCM_RxC_MISC.CRC_ERRORS",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Init flits sent",

        "EventCode": "0x40",

        "EventName": "UNC_CXLCM_RxC_MISC.INIT",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of LLCRD flits sent",

        "EventCode": "0x40",

        "EventName": "UNC_CXLCM_RxC_MISC.LLCRD",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Retry flits sent",

        "EventCode": "0x40",

        "EventName": "UNC_CXLCM_RxC_MISC.RETRY",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles the Packing Buffer is Full",

        "EventCode": "0x52",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_DATA",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles the Packing Buffer is Full",

        "EventCode": "0x52",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_REQ",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles the Packing Buffer is Full",

        "EventCode": "0x52",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_RSP",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles the Packing Buffer is Full",

        "EventCode": "0x52",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_DATA",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles the Packing Buffer is Full",

        "EventCode": "0x52",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_REQ",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Data Packing buffer",

        "EventCode": "0x41",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_DATA",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Req Packing buffer",

        "EventCode": "0x41",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_REQ",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Rsp Packing buffer",

        "EventCode": "0x41",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_RSP",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Data Packing buffer",

        "EventCode": "0x41",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",

        "EventCode": "0x41",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_REQ",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles of Not Empty for Cache Data Packing buffer",

        "EventCode": "0x42",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_DATA",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles of Not Empty for Cache Req Packing buffer",

        "EventCode": "0x42",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_REQ",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles of Not Empty for Cache Rsp Packing buffer",

        "EventCode": "0x42",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_RSP",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles of Not Empty for Mem Data Packing buffer",

        "EventCode": "0x42",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_DATA",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of cycles of Not Empty for Mem Rxx Packing buffer",

        "EventCode": "0x42",

        "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_REQ",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with AK set",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.AK_HDR",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with BE set",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.BE_HDR",

        "PerPkg": "1",

        "UMask": "0x20",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of control flits packed",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.CTRL",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Headerless flits packed",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.NO_HDR",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of protocol flits packed",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.PROT",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of Flits with SZ set",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.SZ_HDR",

        "PerPkg": "1",

        "UMask": "0x40",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Count the number of flits packed",

        "EventCode": "0x05",

        "EventName": "UNC_CXLCM_TxC_FLITS.VALID",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Data Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_DATA",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Req Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ0",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Rsp1 Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ1",

        "PerPkg": "1",

        "UMask": "0x40",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Rsp0 Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP0",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Cache Req Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP1",

        "PerPkg": "1",

        "UMask": "0x20",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Data Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_DATA",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",

        "EventCode": "0x02",

        "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_REQ",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLCM"

    },

    {

        "BriefDescription": "Counts the number of uclk ticks",

        "EventCode": "0x01",

        "EventName": "UNC_CXLDP_CLOCKTICKS",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to M2S Data AGF",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA",

        "PerPkg": "1",

        "UMask": "0x20",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to M2S Req AGF",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_REQ",

        "PerPkg": "1",

        "UMask": "0x10",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to U2C Data AGF",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_DATA",

        "PerPkg": "1",

        "UMask": "0x8",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to U2C Req AGF",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_REQ",

        "PerPkg": "1",

        "UMask": "0x1",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to U2C Rsp AGF 0",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP0",

        "PerPkg": "1",

        "UMask": "0x2",

        "Unit": "CXLDP"

    },

    {

        "BriefDescription": "Number of Allocation to U2C Rsp AGF 1",

        "EventCode": "0x02",

        "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP1",

        "PerPkg": "1",

        "UMask": "0x4",

        "Unit": "CXLDP"

    }

]