Unverified Commit 55233b22 authored by Gu Shengxian's avatar Gu Shengxian Committed by Mark Brown
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ASoC: atmel: fix spelling mistakes



Fix some spelling mistakes as follows:
regaedles ==> regardless
prezent ==> present
underrrun ==> underrun
controlls ==> controls

Signed-off-by: default avatarGu Shengxian <gushengxian@yulong.com>
Link: https://lore.kernel.org/r/20210706100230.32633-1-gushengxian507419@gmail.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 999abd7a
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+3 −3
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@
/* Validity Bit Mode */
#define SPDIFRX_MR_VBMODE_MASK		GENAMSK(1, 1)
#define SPDIFRX_MR_VBMODE_ALWAYS_LOAD \
	(0 << 1)	/* Load sample regardles of validity bit value */
	(0 << 1)	/* Load sample regardless of validity bit value */
#define SPDIFRX_MR_VBMODE_DISCARD_IF_VB1 \
	(1 << 1)	/* Load sample only if validity bit is 0 */

@@ -519,7 +519,7 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev,
	/* check for new data available */
	ret = wait_for_completion_interruptible_timeout(&ch_stat->done,
							msecs_to_jiffies(100));
	/* IP might not be started or valid stream might not be prezent */
	/* IP might not be started or valid stream might not be present */
	if (ret < 0) {
		dev_dbg(dev->dev, "channel status for channel %d timeout\n",
			channel);
@@ -571,7 +571,7 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev,
	mchp_spdifrx_isr_blockend_en(dev);
	ret = wait_for_completion_interruptible_timeout(&user_data->done,
							msecs_to_jiffies(100));
	/* IP might not be started or valid stream might not be prezent */
	/* IP might not be started or valid stream might not be present */
	if (ret <= 0) {
		dev_dbg(dev->dev, "user data for channel %d timeout\n",
			channel);
+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@
#define SPDIFTX_MR_VALID1			BIT(24)
#define SPDIFTX_MR_VALID2			BIT(25)

/* Disable Null Frame on underrrun */
/* Disable Null Frame on underrun */
#define SPDIFTX_MR_DNFR_MASK		GENMASK(27, 27)
#define SPDIFTX_MR_DNFR_INVALID		(0 << 27)
#define SPDIFTX_MR_DNFR_VALID		(1 << 27)
+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
//   IN2 +---o--+------------+--o---+ OUT2
//               loop2 relays
//
// The 'loop1' gpio pin controlls two relays, which are either in loop
// The 'loop1' gpio pin controls two relays, which are either in loop
// position, meaning that input and output are directly connected, or
// they are in mixer position, meaning that the signal is passed through
// the 'Sum' mixer. Similarly for 'loop2'.