Commit 55afdd05 authored by Jonathan Cameron's avatar Jonathan Cameron
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iio: adc: ti-ads131e08: Fix alignment for DMA safety



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d935eddd ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Tomislav Denis <tomislav.denis@avl.com>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-36-jic23@kernel.org
parent 7df19bd2
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+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ struct ads131e08_state {
		s64 ts __aligned(8);
	} tmp_buf;

	u8 tx_buf[3] ____cacheline_aligned;
	u8 tx_buf[3] __aligned(IIO_DMA_MINALIGN);
	/*
	 * Add extra one padding byte to be able to access the last channel
	 * value using u32 pointer