Commit 55b201a8 authored by Ian Rogers's avatar Ian Rogers Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events: Update Intel cascadelakex

Events remain at v1.16, and the metrics are based on TMA 4.4 full.

Use script at:
https://github.com/intel/event-converter-for-linux-perf/blob/master/download_and_gen.py
with updates at:
https://github.com/captain5050/event-converter-for-linux-perf

Updates include:
 - Removal of ScaleUnit from uncore events by Zhengjun Xing
   <zhengjun.xing@linux.intel.com>.
 - Rename of topdown TMA metrics from Frontend_Bound to tma_frontend_bound.
 - _SMT suffix metrics are dropped as the #SMT_On and #EBS_Mode are
   correctly expanded in the single main metric.
 - Addition of all 6 levels of TMA metrics. Child metrics are placed
   in a group named after their parent allowing children of a metric
   to be easily measured using the metric name with a _group suffix.
 - ## and ##? operators are correctly expanded.
 - The locate-with column is added to the long description describing
   a sampling event.
 - Metrics are written in terms of other metrics to reduce the
   expression size and increase readability.
 - Latest metrics from: https://github.com/intel/perfmon-metrics



Tested with 'perf test':
 10: PMU events                                                      :
 10.1: PMU event table sanity                                        : Ok
 10.2: PMU event map aliases                                         : Ok
 10.3: Parsing of PMU event table metrics                            : Ok
 10.4: Parsing of PMU event table metrics with fake PMUs             : Ok

Signed-off-by: default avatarIan Rogers <irogers@google.com>
Cc: Ahmad Yasin <ahmad.yasin@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Florian Fischer <florian.fischer@muhq.space>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kshipra Bopardikar <kshipra.bopardikar@intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Miaoqian Lin <linmq006@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Samantha Alt <samantha.alt@intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20221004021612.325521-10-irogers@google.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 5bc4e39e
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+778 −507

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+8 −10
Original line number Diff line number Diff line
@@ -27,20 +27,19 @@
        "Unit": "iMC"
    },
    {
        "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd",
        "BriefDescription": "All DRAM Read CAS Commands issued (including underfills)",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "LLC_MISSES.MEM_READ",
        "EventName": "UNC_M_CAS_COUNT.RD",
        "PerPkg": "1",
        "ScaleUnit": "64Bytes",
        "UMask": "0x3",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "read requests to memory controller",
        "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.RD",
        "EventName": "LLC_MISSES.MEM_READ",
        "PerPkg": "1",
        "ScaleUnit": "64Bytes",
        "UMask": "0x3",
@@ -56,20 +55,19 @@
        "Unit": "iMC"
    },
    {
        "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
        "BriefDescription": "All DRAM Write CAS commands issued",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "LLC_MISSES.MEM_WRITE",
        "EventName": "UNC_M_CAS_COUNT.WR",
        "PerPkg": "1",
        "ScaleUnit": "64Bytes",
        "UMask": "0xC",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "write requests to memory controller",
        "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.WR",
        "EventName": "LLC_MISSES.MEM_WRITE",
        "PerPkg": "1",
        "ScaleUnit": "64Bytes",
        "UMask": "0xC",
+1 −9
Original line number Diff line number Diff line
@@ -1477,7 +1477,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x01",
        "ScaleUnit": "4Bytes",
        "UMask": "0x01",
        "Unit": "IIO"
    },
@@ -1489,7 +1488,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x02",
        "ScaleUnit": "4Bytes",
        "UMask": "0x01",
        "Unit": "IIO"
    },
@@ -1501,7 +1499,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x04",
        "ScaleUnit": "4Bytes",
        "UMask": "0x01",
        "Unit": "IIO"
    },
@@ -1513,7 +1510,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x08",
        "ScaleUnit": "4Bytes",
        "UMask": "0x01",
        "Unit": "IIO"
    },
@@ -1584,7 +1580,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x01",
        "ScaleUnit": "4Bytes",
        "UMask": "0x04",
        "Unit": "IIO"
    },
@@ -1596,7 +1591,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x02",
        "ScaleUnit": "4Bytes",
        "UMask": "0x04",
        "Unit": "IIO"
    },
@@ -1608,7 +1602,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x04",
        "ScaleUnit": "4Bytes",
        "UMask": "0x04",
        "Unit": "IIO"
    },
@@ -1620,7 +1613,6 @@
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x08",
        "ScaleUnit": "4Bytes",
        "UMask": "0x04",
        "Unit": "IIO"
    },
@@ -2254,7 +2246,7 @@
        "Unit": "UPI LL"
    },
    {
        "BriefDescription": "FLITs received which bypassed the Slot0 Receive Buffer",
        "BriefDescription": "FLITs received which bypassed the Slot0 Recieve Buffer",
        "Counter": "0,1,2,3",
        "EventCode": "0x31",
        "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",