Commit 58eb575c authored by Marian-Cristian Rotariu's avatar Marian-Cristian Rotariu Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774e1: Add TMU device nodes 



This patch adds TMU[01234] device tree nodes to the r8a774e1
SoC specific DT.

Signed-off-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent c6c4b7de

arch/arm64/boot/dts/renesas/r8a774e1.dtsi

+65 −0
Original line number Diff line number Diff line
@@ -542,6 +542,71 @@ intc_ex: interrupt-controller@e61c0000 { 
			resets = <&cpg 407>;

		};



		tmu0: timer@e61e0000 {

			compatible = "renesas,tmu-r8a774e1", "renesas,tmu";

			reg = <0 0xe61e0000 0 0x30>;

			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 125>;

			clock-names = "fck";

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 125>;

			status = "disabled";

		};



		tmu1: timer@e6fc0000 {

			compatible = "renesas,tmu-r8a774e1", "renesas,tmu";

			reg = <0 0xe6fc0000 0 0x30>;

			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 124>;

			clock-names = "fck";

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 124>;

			status = "disabled";

		};



		tmu2: timer@e6fd0000 {

			compatible = "renesas,tmu-r8a774e1", "renesas,tmu";

			reg = <0 0xe6fd0000 0 0x30>;

			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 123>;

			clock-names = "fck";

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 123>;

			status = "disabled";

		};



		tmu3: timer@e6fe0000 {

			compatible = "renesas,tmu-r8a774e1", "renesas,tmu";

			reg = <0 0xe6fe0000 0 0x30>;

			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 122>;

			clock-names = "fck";

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 122>;

			status = "disabled";

		};



		tmu4: timer@ffc00000 {

			compatible = "renesas,tmu-r8a774e1", "renesas,tmu";

			reg = <0 0xffc00000 0 0x30>;

			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 121>;

			clock-names = "fck";

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 121>;

			status = "disabled";

		};



		i2c2: i2c@e6510000 {

			reg = <0 0xe6510000 0 0x40>;

			#address-cells = <1>;