Commit 5a443893 authored by Jes Sorensen's avatar Jes Sorensen Committed by Greg Kroah-Hartman
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staging: rtl8723au: No need for CHKBIT since 16 + 12 is still < 32

parent 072fc84d
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+3 −3
Original line number Diff line number Diff line
@@ -382,7 +382,7 @@ void add_RATid23a(struct rtw_adapter *padapter, struct sta_info *psta, u8 rssi_l

		for (i = 0; i < limit; i++) {
			if (psta_ht->ht_cap.mcs.rx_mask[i / 8] & BIT(i % 8))
				tx_ra_bitmap |= CHKBIT(i+12);
				tx_ra_bitmap |= BIT(i + 12);
		}

		/* max short GI rate */