Commit 5a711e58 authored by Krzysztof Czurylo's avatar Krzysztof Czurylo Committed by Leon Romanovsky
Browse files

RDMA/irdma: Refactor HW statistics 



Refactor HW statistics which,

- Unifies HW statistics support for all HW generations.

- Unifies support of 32- and 64-bit counters.

- Removes duplicated code and simplifies implementation.

- Fixes roll-over handling.

- Removes unneeded last_hw_stats.

With new implementation, there is no separate handling and no separate
arrays for 32- and 64-bit counters (offsets, regs, values). Instead,
there is a HW stats map array for each HW revision, which defines
HW-specific width and location of each counter in the statistics buffer.

Once the statistics are gathered (either via CQP op, or by reading HW
registers), counter values are extracted from the statistics buffer using
the stats map and the delta between the last and new values is computed.
Finally, the counter values in rdma_hw_stats are incremented by those
deltas.

From the OS perspective, all the counters are 64-bit and their order in
rdma_hw_stats->value[] array, as well as in irdma_hw_stat_names[], is the
same for all HW gens.  New statistics should always be added at the end.

Signed-off-by: default avatarKrzysztof Czurylo <krzysztof.czurylo@intel.com>
Signed-off-by: default avatarYouvaraj Sagar <youvaraj.sagar@intel.com>
Signed-off-by: default avatarShiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230315145305.955-2-shiraz.saleem@intel.com


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 6ea0c2de

drivers/infiniband/hw/irdma/ctrl.c

+110 −214
Original line number Diff line number Diff line
@@ -1867,8 +1867,6 @@ void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi, 
	vsi->mtu = info->params->mtu;

	vsi->exception_lan_q = info->exception_lan_q;

	vsi->vsi_idx = info->pf_data_vsi_num;

	if (vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)

		vsi->fcn_id = info->dev->hmc_fn_id;



	irdma_set_qos_info(vsi, info->params);

	for (i = 0; i < IRDMA_MAX_USER_PRIORITY; i++) {
@@ -1887,32 +1885,56 @@ void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi, 
}



/**

 * irdma_get_fcn_id - Return the function id

 * irdma_get_stats_idx - Return stats index

 * @vsi: pointer to the vsi

 */

static u8 irdma_get_fcn_id(struct irdma_sc_vsi *vsi)

static u8 irdma_get_stats_idx(struct irdma_sc_vsi *vsi)

{

	struct irdma_stats_inst_info stats_info = {};

	struct irdma_sc_dev *dev = vsi->dev;

	u8 fcn_id = IRDMA_INVALID_FCN_ID;

	u8 start_idx, max_stats, i;

	u8 i;



	if (dev->hw_attrs.uk_attrs.hw_rev != IRDMA_GEN_1) {

	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {

		if (!irdma_cqp_stats_inst_cmd(vsi, IRDMA_OP_STATS_ALLOCATE,

					      &stats_info))

			return stats_info.stats_idx;

	}



	start_idx = 1;

	max_stats = 16;

	for (i = start_idx; i < max_stats; i++)

		if (!dev->fcn_id_array[i]) {

			fcn_id = i;

			dev->fcn_id_array[i] = true;

			break;

	for (i = 0; i < IRDMA_MAX_STATS_COUNT_GEN_1; i++) {

		if (!dev->stats_idx_array[i]) {

			dev->stats_idx_array[i] = true;

			return i;

		}

	}



	return fcn_id;

	return IRDMA_INVALID_STATS_IDX;

}



/**

 * irdma_hw_stats_init_gen1 - Initialize stat reg table used for gen1

 * @vsi: vsi structure where hw_regs are set

 *

 * Populate the HW stats table

 */

static void irdma_hw_stats_init_gen1(struct irdma_sc_vsi *vsi)

{

	struct irdma_sc_dev *dev = vsi->dev;

	const struct irdma_hw_stat_map *map;

	u64 *stat_reg = vsi->hw_stats_regs;

	u64 *regs = dev->hw_stats_regs;

	u16 i, stats_reg_set = vsi->stats_idx;



	map = dev->hw_stats_map;



	/* First 4 stat instances are reserved for port level statistics. */

	stats_reg_set += vsi->stats_inst_alloc ? IRDMA_FIRST_NON_PF_STAT : 0;



	for (i = 0; i < dev->hw_attrs.max_stat_idx; i++) {

		if (map[i].bitmask <= IRDMA_MAX_STATS_32)

			stat_reg[i] = regs[i] + stats_reg_set * sizeof(u32);

		else

			stat_reg[i] = regs[i] + stats_reg_set * sizeof(u64);

	}

}



/**
@@ -1923,7 +1945,6 @@ static u8 irdma_get_fcn_id(struct irdma_sc_vsi *vsi) 
int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,

			 struct irdma_vsi_stats_info *info)

{

	u8 fcn_id = info->fcn_id;

	struct irdma_dma_mem *stats_buff_mem;



	vsi->pestat = info->pestat;
@@ -1944,26 +1965,24 @@ int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi, 
			 IRDMA_GATHER_STATS_BUF_SIZE);



	irdma_hw_stats_start_timer(vsi);

	if (info->alloc_fcn_id)

		fcn_id = irdma_get_fcn_id(vsi);

	if (fcn_id == IRDMA_INVALID_FCN_ID)

		goto stats_error;



	vsi->stats_fcn_id_alloc = info->alloc_fcn_id;

	vsi->fcn_id = fcn_id;

	if (info->alloc_fcn_id) {



	/* when stat allocation is not required default to fcn_id. */

	vsi->stats_idx = info->fcn_id;

	if (info->alloc_stats_inst) {

		u8 stats_idx = irdma_get_stats_idx(vsi);



		if (stats_idx != IRDMA_INVALID_STATS_IDX) {

			vsi->stats_inst_alloc = true;

			vsi->stats_idx = stats_idx;

			vsi->pestat->gather_info.use_stats_inst = true;

		vsi->pestat->gather_info.stats_inst_index = fcn_id;

			vsi->pestat->gather_info.stats_inst_index = stats_idx;

		}

	}



	return 0;



stats_error:

	dma_free_coherent(vsi->pestat->hw->device, stats_buff_mem->size,

			  stats_buff_mem->va, stats_buff_mem->pa);

	stats_buff_mem->va = NULL;

	if (vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)

		irdma_hw_stats_init_gen1(vsi);



	return -EIO;

	return 0;

}



/**
@@ -1973,19 +1992,19 @@ int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi, 
void irdma_vsi_stats_free(struct irdma_sc_vsi *vsi)

{

	struct irdma_stats_inst_info stats_info = {};

	u8 fcn_id = vsi->fcn_id;

	struct irdma_sc_dev *dev = vsi->dev;

	u8 stats_idx = vsi->stats_idx;



	if (dev->hw_attrs.uk_attrs.hw_rev != IRDMA_GEN_1) {

		if (vsi->stats_fcn_id_alloc) {

			stats_info.stats_idx = vsi->fcn_id;

	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {

		if (vsi->stats_inst_alloc) {

			stats_info.stats_idx = vsi->stats_idx;

			irdma_cqp_stats_inst_cmd(vsi, IRDMA_OP_STATS_FREE,

						 &stats_info);

		}

	} else {

		if (vsi->stats_fcn_id_alloc &&

		    fcn_id < vsi->dev->hw_attrs.max_stat_inst)

			vsi->dev->fcn_id_array[fcn_id] = false;

		if (vsi->stats_inst_alloc &&

		    stats_idx < vsi->dev->hw_attrs.max_stat_inst)

			vsi->dev->stats_idx_array[stats_idx] = false;

	}



	if (!vsi->pestat)
@@ -5297,7 +5316,8 @@ void sc_vsi_update_stats(struct irdma_sc_vsi *vsi) 
	gather_stats = vsi->pestat->gather_info.gather_stats_va;

	last_gather_stats = vsi->pestat->gather_info.last_gather_stats_va;

	irdma_update_stats(&vsi->pestat->hw_stats, gather_stats,

			   last_gather_stats);

			   last_gather_stats, vsi->dev->hw_stats_map,

			   vsi->dev->hw_attrs.max_stat_idx);

}



/**
@@ -5404,186 +5424,62 @@ int irdma_sc_dev_init(enum irdma_vers ver, struct irdma_sc_dev *dev, 
	return ret_code;

}



/**

 * irdma_stat_val - Extract HW counter value from statistics buffer

 * @stats_val: pointer to statistics buffer

 * @byteoff: byte offset of counter value in the buffer (8B-aligned)

 * @bitoff: bit offset of counter value within 8B entry

 * @bitmask: maximum counter value (e.g. 0xffffff for 24-bit counter)

 */

static inline u64 irdma_stat_val(const u64 *stats_val, u16 byteoff, u8 bitoff,

				 u64 bitmask)

{

	u16 idx = byteoff / sizeof(*stats_val);



	return (stats_val[idx] >> bitoff) & bitmask;

}



/**

 * irdma_stat_delta - Calculate counter delta

 * @new_val: updated counter value

 * @old_val: last counter value

 * @max_val: maximum counter value (e.g. 0xffffff for 24-bit counter)

 */

static inline u64 irdma_stat_delta(u64 new_val, u64 old_val, u64 max_val)

{

	if (new_val >= old_val)

		return new_val - old_val;



	/* roll-over case */

	return max_val - old_val + new_val + 1;

}



/**

 * irdma_update_stats - Update statistics

 * @hw_stats: hw_stats instance to update

 * @gather_stats: updated stat counters

 * @last_gather_stats: last stat counters

 * @map: HW stat map (hw_stats => gather_stats)

 * @max_stat_idx: number of HW stats

 */

void irdma_update_stats(struct irdma_dev_hw_stats *hw_stats,

			struct irdma_gather_stats *gather_stats,

			struct irdma_gather_stats *last_gather_stats)

{

	u64 *stats_val = hw_stats->stats_val_32;



	stats_val[IRDMA_HW_STAT_INDEX_RXVLANERR] +=

		IRDMA_STATS_DELTA(gather_stats->rxvlanerr,

				  last_gather_stats->rxvlanerr,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXDISCARD] +=

		IRDMA_STATS_DELTA(gather_stats->ip4rxdiscard,

				  last_gather_stats->ip4rxdiscard,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXTRUNC] +=

		IRDMA_STATS_DELTA(gather_stats->ip4rxtrunc,

				  last_gather_stats->ip4rxtrunc,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txnoroute,

				  last_gather_stats->ip4txnoroute,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXDISCARD] +=

		IRDMA_STATS_DELTA(gather_stats->ip6rxdiscard,

				  last_gather_stats->ip6rxdiscard,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXTRUNC] +=

		IRDMA_STATS_DELTA(gather_stats->ip6rxtrunc,

				  last_gather_stats->ip6rxtrunc,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txnoroute,

				  last_gather_stats->ip6txnoroute,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_TCPRTXSEG] +=

		IRDMA_STATS_DELTA(gather_stats->tcprtxseg,

				  last_gather_stats->tcprtxseg,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_TCPRXOPTERR] +=

		IRDMA_STATS_DELTA(gather_stats->tcprxopterr,

				  last_gather_stats->tcprxopterr,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] +=

		IRDMA_STATS_DELTA(gather_stats->tcprxprotoerr,

				  last_gather_stats->tcprxprotoerr,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED] +=

		IRDMA_STATS_DELTA(gather_stats->rxrpcnphandled,

				  last_gather_stats->rxrpcnphandled,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED] +=

		IRDMA_STATS_DELTA(gather_stats->rxrpcnpignored,

				  last_gather_stats->rxrpcnpignored,

				  IRDMA_MAX_STATS_32);

	stats_val[IRDMA_HW_STAT_INDEX_TXNPCNPSENT] +=

		IRDMA_STATS_DELTA(gather_stats->txnpcnpsent,

				  last_gather_stats->txnpcnpsent,

				  IRDMA_MAX_STATS_32);

	stats_val = hw_stats->stats_val_64;

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXOCTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4rxocts,

				  last_gather_stats->ip4rxocts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4rxpkts,

				  last_gather_stats->ip4rxpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXFRAGS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txfrag,

				  last_gather_stats->ip4txfrag,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4rxmcpkts,

				  last_gather_stats->ip4rxmcpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4TXOCTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txocts,

				  last_gather_stats->ip4txocts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4TXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txpkts,

				  last_gather_stats->ip4txpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4TXFRAGS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txfrag,

				  last_gather_stats->ip4txfrag,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip4txmcpkts,

				  last_gather_stats->ip4txmcpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXOCTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6rxocts,

				  last_gather_stats->ip6rxocts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6rxpkts,

				  last_gather_stats->ip6rxpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXFRAGS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txfrags,

				  last_gather_stats->ip6txfrags,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6rxmcpkts,

				  last_gather_stats->ip6rxmcpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6TXOCTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txocts,

				  last_gather_stats->ip6txocts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6TXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txpkts,

				  last_gather_stats->ip6txpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6TXFRAGS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txfrags,

				  last_gather_stats->ip6txfrags,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->ip6txmcpkts,

				  last_gather_stats->ip6txmcpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_TCPRXSEGS] +=

		IRDMA_STATS_DELTA(gather_stats->tcprxsegs,

				  last_gather_stats->tcprxsegs,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_TCPTXSEG] +=

		IRDMA_STATS_DELTA(gather_stats->tcptxsegs,

				  last_gather_stats->tcptxsegs,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMARXRDS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmarxrds,

				  last_gather_stats->rdmarxrds,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMARXSNDS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmarxsnds,

				  last_gather_stats->rdmarxsnds,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMARXWRS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmarxwrs,

				  last_gather_stats->rdmarxwrs,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMATXRDS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmatxrds,

				  last_gather_stats->rdmatxrds,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMATXSNDS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmatxsnds,

				  last_gather_stats->rdmatxsnds,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMATXWRS] +=

		IRDMA_STATS_DELTA(gather_stats->rdmatxwrs,

				  last_gather_stats->rdmatxwrs,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMAVBND] +=

		IRDMA_STATS_DELTA(gather_stats->rdmavbn,

				  last_gather_stats->rdmavbn,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RDMAVINV] +=

		IRDMA_STATS_DELTA(gather_stats->rdmavinv,

				  last_gather_stats->rdmavinv,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_UDPRXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->udprxpkts,

				  last_gather_stats->udprxpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_UDPTXPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->udptxpkts,

				  last_gather_stats->udptxpkts,

				  IRDMA_MAX_STATS_48);

	stats_val[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS] +=

		IRDMA_STATS_DELTA(gather_stats->rxnpecnmrkpkts,

				  last_gather_stats->rxnpecnmrkpkts,

				  IRDMA_MAX_STATS_48);

			struct irdma_gather_stats *last_gather_stats,

			const struct irdma_hw_stat_map *map, u16 max_stat_idx)

{

	u64 *stats_val = hw_stats->stats_val;

	u16 i;



	for (i = 0; i < max_stat_idx; i++) {

		u64 new_val = irdma_stat_val(gather_stats->val, map[i].byteoff,

					     map[i].bitoff, map[i].bitmask);

		u64 last_val = irdma_stat_val(last_gather_stats->val,

					      map[i].byteoff, map[i].bitoff,

					      map[i].bitmask);



		stats_val[i] +=

			irdma_stat_delta(new_val, last_val, map[i].bitmask);

	}



	memcpy(last_gather_stats, gather_stats, sizeof(*last_gather_stats));

}

drivers/infiniband/hw/irdma/defs.h

+6 −3
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ enum irdma_protocol_used { 
#define IRDMA_QP_STATE_ERROR		6



#define IRDMA_MAX_TRAFFIC_CLASS		8

#define	IRDMA_MAX_STATS_COUNT_GEN_1	12

#define IRDMA_MAX_USER_PRIORITY		8

#define IRDMA_MAX_APPS			8

#define IRDMA_MAX_STATS_COUNT		128
@@ -365,9 +366,11 @@ enum irdma_cqp_op_type { 
#define FLD_RS_32(dev, val, field)	\

	((u64)((val) & (dev)->hw_masks[field ## _M]) >> (dev)->hw_shifts[field ## _S])



#define IRDMA_STATS_DELTA(a, b, c) ((a) >= (b) ? (a) - (b) : (a) + (c) - (b))

#define IRDMA_MAX_STATS_32	0xFFFFFFFFULL

#define IRDMA_MAX_STATS_48	0xFFFFFFFFFFFFULL

#define IRDMA_MAX_STATS_24	0xffffffULL

#define IRDMA_MAX_STATS_32	0xffffffffULL

#define IRDMA_MAX_STATS_48	0xffffffffffffULL

#define IRDMA_MAX_STATS_56	0xffffffffffffffULL

#define IRDMA_MAX_STATS_64	0xffffffffffffffffULL



#define IRDMA_MAX_CQ_READ_THRESH 0x3FFFF

#define IRDMA_CQPSQ_QHASH_VLANID GENMASK_ULL(43, 32)

drivers/infiniband/hw/irdma/i40iw_hw.c

+51 −9
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ static u32 i40iw_regs[IRDMA_MAX_REGS] = { 
	0xffffffff      /* PFINT_RATEN not used in FPK */

};



static u32 i40iw_stat_offsets_32[IRDMA_HW_STAT_INDEX_MAX_32] = {

static u32 i40iw_stat_offsets[] = {

	I40E_GLPES_PFIP4RXDISCARD(0),

	I40E_GLPES_PFIP4RXTRUNC(0),

	I40E_GLPES_PFIP4TXNOROUTE(0),
@@ -42,10 +42,8 @@ static u32 i40iw_stat_offsets_32[IRDMA_HW_STAT_INDEX_MAX_32] = { 
	I40E_GLPES_PFTCPRTXSEG(0),

	I40E_GLPES_PFTCPRXOPTERR(0),

	I40E_GLPES_PFTCPRXPROTOERR(0),

	I40E_GLPES_PFRXVLANERR(0)

};

	I40E_GLPES_PFRXVLANERR(0),



static u32 i40iw_stat_offsets_64[IRDMA_HW_STAT_INDEX_MAX_64] = {

	I40E_GLPES_PFIP4RXOCTSLO(0),

	I40E_GLPES_PFIP4RXPKTSLO(0),

	I40E_GLPES_PFIP4RXFRAGSLO(0),
@@ -158,6 +156,51 @@ static const struct irdma_irq_ops i40iw_irq_ops = { 
	.irdma_en_irq = i40iw_ena_irq,

};



static const struct irdma_hw_stat_map i40iw_hw_stat_map[] = {

	[IRDMA_HW_STAT_INDEX_RXVLANERR]	=	{   0,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_IP4RXOCTS] =	{   8,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXPKTS] =	{  16,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD] =	{  24,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC] =	{  32,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS] =      {  40,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS] =     {  48,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXOCTS] =       {  56,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXPKTS] =       {  64,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD] =    {  72,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC] =      {  80,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS] =      {  88,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS] =     {  96,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXOCTS] =       { 104,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXPKTS] =       { 112,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS] =      { 120,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS] =     { 128,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXOCTS] =       { 136,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXPKTS] =       { 144,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS] =      { 152,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS] =     { 160,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] =    { 168,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] =    { 176,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPRXSEGS] =       { 184,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR] =     { 192,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] =   { 200,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPTXSEG] =        { 208,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_TCPRTXSEG] =       { 216,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_RDMARXWRS] =       { 224,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMARXRDS] =       { 232,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMARXSNDS] =      { 240,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXWRS] =       { 248,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXRDS] =       { 256,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXSNDS] =      { 264,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMAVBND] =        { 272,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMAVINV] =        { 280,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS] =     { 288,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS] =     { 296,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS] =     { 304,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS] =     { 312,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_UDPRXPKTS] =       { 320,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_UDPTXPKTS] =       { 328,  0, IRDMA_MAX_STATS_48 },

};



void i40iw_init_hw(struct irdma_sc_dev *dev)

{

	int i;
@@ -172,11 +215,8 @@ void i40iw_init_hw(struct irdma_sc_dev *dev) 
		dev->hw_regs[i] = (u32 __iomem *)(i40iw_regs[i] + hw_addr);

	}



	for (i = 0; i < IRDMA_HW_STAT_INDEX_MAX_32; ++i)

		dev->hw_stats_regs_32[i] = i40iw_stat_offsets_32[i];



	for (i = 0; i < IRDMA_HW_STAT_INDEX_MAX_64; ++i)

		dev->hw_stats_regs_64[i] = i40iw_stat_offsets_64[i];

	for (i = 0; i < IRDMA_HW_STAT_INDEX_MAX_GEN_1; ++i)

		dev->hw_stats_regs[i] = i40iw_stat_offsets[i];



	dev->hw_attrs.first_hw_vf_fpm_id = I40IW_FIRST_VF_FPM_ID;

	dev->hw_attrs.max_hw_vf_fpm_id = IRDMA_MAX_VF_FPM_ID;
@@ -195,6 +235,7 @@ void i40iw_init_hw(struct irdma_sc_dev *dev) 
	dev->ceq_itr_mask_db = NULL;

	dev->aeq_itr_mask_db = NULL;

	dev->irq_ops = &i40iw_irq_ops;

	dev->hw_stats_map = i40iw_hw_stat_map;



	/* Setup the hardware limits, hmc may limit further */

	dev->hw_attrs.uk_attrs.max_hw_wq_frags = I40IW_MAX_WQ_FRAGMENT_COUNT;
@@ -210,6 +251,7 @@ void i40iw_init_hw(struct irdma_sc_dev *dev) 
	dev->hw_attrs.uk_attrs.max_hw_sq_chunk = I40IW_MAX_QUANTA_PER_WR;

	dev->hw_attrs.max_hw_pds = I40IW_MAX_PDS;

	dev->hw_attrs.max_stat_inst = I40IW_MAX_STATS_COUNT;

	dev->hw_attrs.max_stat_idx = IRDMA_HW_STAT_INDEX_MAX_GEN_1;

	dev->hw_attrs.max_hw_outbound_msg_size = I40IW_MAX_OUTBOUND_MSG_SIZE;

	dev->hw_attrs.max_hw_inbound_msg_size = I40IW_MAX_INBOUND_MSG_SIZE;

	dev->hw_attrs.max_qp_wr = I40IW_MAX_QP_WRS;

drivers/infiniband/hw/irdma/icrdma_hw.c

+51 −0
Original line number Diff line number Diff line
@@ -111,6 +111,55 @@ static const struct irdma_irq_ops icrdma_irq_ops = { 
	.irdma_en_irq = icrdma_ena_irq,

};



static const struct irdma_hw_stat_map icrdma_hw_stat_map[] = {

	[IRDMA_HW_STAT_INDEX_RXVLANERR]	=	{   0, 32, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_IP4RXOCTS] =	{   8,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXPKTS] =	{  16,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD] =	{  24, 32, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC] =	{  24,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS] =	{  32,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS] =	{  40,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS] =	{  48,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXOCTS] =	{  56,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXPKTS] =	{  64,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD] =	{  72, 32, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC] =	{  72,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS] =	{  80,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS] =	{  88,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS] =	{  96,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXOCTS] =	{ 104,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXPKTS] =	{ 112,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS] =	{ 120,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS] =	{ 128,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS] =	{ 136,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXOCTS] =	{ 144,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXPKTS] =	{ 152,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS] =	{ 160,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS] =	{ 168,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS] =	{ 176,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] =	{ 184, 32, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] =	{ 184,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPRXSEGS] =	{ 192, 32, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR] =	{ 200, 32, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] =	{ 200,  0, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_TCPTXSEG] =	{ 208,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_TCPRTXSEG] =	{ 216, 32, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_UDPRXPKTS] =	{ 224,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_UDPTXPKTS] =	{ 232,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMARXWRS] =	{ 240,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMARXRDS] =	{ 248,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMARXSNDS] =	{ 256,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXWRS] =	{ 264,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXRDS] =	{ 272,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMATXSNDS] =	{ 280,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMAVBND] =	{ 288,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RDMAVINV] =	{ 296,  0, IRDMA_MAX_STATS_48 },

	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS] = { 304,  0, IRDMA_MAX_STATS_56 },

	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED] =	{ 312, 32, IRDMA_MAX_STATS_24 },

	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED] =	{ 312,  0, IRDMA_MAX_STATS_32 },

	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT] =	{ 320,  0, IRDMA_MAX_STATS_32 },

};



void icrdma_init_hw(struct irdma_sc_dev *dev)

{

	int i;
@@ -140,9 +189,11 @@ void icrdma_init_hw(struct irdma_sc_dev *dev) 
	dev->cq_ack_db = dev->hw_regs[IRDMA_CQACK];

	dev->irq_ops = &icrdma_irq_ops;

	dev->hw_attrs.page_size_cap = SZ_4K | SZ_2M | SZ_1G;

	dev->hw_stats_map = icrdma_hw_stat_map;

	dev->hw_attrs.max_hw_ird = ICRDMA_MAX_IRD_SIZE;

	dev->hw_attrs.max_hw_ord = ICRDMA_MAX_ORD_SIZE;

	dev->hw_attrs.max_stat_inst = ICRDMA_MAX_STATS_COUNT;

	dev->hw_attrs.max_stat_idx = IRDMA_HW_STAT_INDEX_MAX_GEN_2;



	dev->hw_attrs.uk_attrs.max_hw_sq_chunk = IRDMA_MAX_QUANTA_PER_WR;

	dev->hw_attrs.uk_attrs.feature_flags |= IRDMA_FEATURE_RTS_AE |

drivers/infiniband/hw/irdma/irdma.h

+1 −0
Original line number Diff line number Diff line
@@ -147,6 +147,7 @@ struct irdma_hw_attrs { 
	u32 max_sleep_count;

	u32 max_cqp_compl_wait_time_ms;

	u16 max_stat_inst;

	u16 max_stat_idx;

};



void i40iw_init_hw(struct irdma_sc_dev *dev);