Commit 5bd78c00 authored by Siddharth Vadapalli's avatar Siddharth Vadapalli Committed by Vinod Koul
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phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J721e 



Each of the CPSW9G ports in J721e support additional modes like QSGMII.
Add a new compatible for J721e to support the additional modes.

In TI's J721e, each of the CPSW9G ethernet interfaces can act as a
QSGMII main or QSGMII-SUB port. The QSGMII main interface is responsible
for performing auto-negotiation between the MAC and the PHY while the rest
of the interfaces are designated as QSGMII-SUB interfaces, indicating that
they will not be taking part in the auto-negotiation process.

Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20221026074532.109220-4-s-vadapalli@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 3b66ab69

drivers/phy/ti/phy-gmii-sel.c

+13 −0
Original line number Diff line number Diff line
@@ -218,6 +218,15 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw5g_soc_j7200 = { 
	.num_qsgmii_main_ports = 1,

};



static const

struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw9g_soc_j721e = {

	.use_of_data = true,

	.regfields = phy_gmii_sel_fields_am654,

	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII),

	.num_ports = 8,

	.num_qsgmii_main_ports = 2,

};



static const struct of_device_id phy_gmii_sel_id_table[] = {

	{

		.compatible	= "ti,am3352-phy-gmii-sel",
@@ -243,6 +252,10 @@ static const struct of_device_id phy_gmii_sel_id_table[] = { 
		.compatible	= "ti,j7200-cpsw5g-phy-gmii-sel",

		.data		= &phy_gmii_sel_cpsw5g_soc_j7200,

	},

	{

		.compatible	= "ti,j721e-cpsw9g-phy-gmii-sel",

		.data		= &phy_gmii_sel_cpsw9g_soc_j721e,

	},

	{}

};

MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table);