Loading drivers/spi/spi_bfin5xx.c +5 −42 Original line number Diff line number Diff line Loading @@ -255,43 +255,6 @@ static inline void bfin_spi_dummy_read(struct driver_data *drv_data) (void) read_RDBR(drv_data); } static void bfin_spi_null_writer(struct driver_data *drv_data) { u8 n_bytes = drv_data->n_bytes; u16 tx_val = drv_data->cur_chip->idle_tx_val; /* clear RXS (we check for RXS inside the loop) */ bfin_spi_dummy_read(drv_data); while (drv_data->tx < drv_data->tx_end) { write_TDBR(drv_data, tx_val); drv_data->tx += n_bytes; /* wait until transfer finished. checking SPIF or TXS may not guarantee transfer completion */ while (!(read_STAT(drv_data) & BIT_STAT_RXS)) cpu_relax(); /* discard RX data and clear RXS */ bfin_spi_dummy_read(drv_data); } } static void bfin_spi_null_reader(struct driver_data *drv_data) { u8 n_bytes = drv_data->n_bytes; u16 tx_val = drv_data->cur_chip->idle_tx_val; /* discard old RX data and clear RXS */ bfin_spi_dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { write_TDBR(drv_data, tx_val); drv_data->rx += n_bytes; while (!(read_STAT(drv_data) & BIT_STAT_RXS)) cpu_relax(); bfin_spi_dummy_read(drv_data); } } static void bfin_spi_u8_writer(struct driver_data *drv_data) { /* clear RXS (we check for RXS inside the loop) */ Loading Loading @@ -680,9 +643,9 @@ static void bfin_spi_pump_transfers(unsigned long data) transfer->bits_per_word = chip->bits_per_word; drv_data->n_bytes = chip->n_bytes; width = chip->width; drv_data->write = drv_data->tx ? chip->write : bfin_spi_null_writer; drv_data->read = drv_data->rx ? chip->read : bfin_spi_null_reader; drv_data->duplex = chip->duplex ? chip->duplex : bfin_spi_null_writer; drv_data->write = chip->write; drv_data->read = chip->read; drv_data->duplex = chip->duplex; break; } cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); Loading @@ -695,8 +658,8 @@ static void bfin_spi_pump_transfers(unsigned long data) drv_data->len = transfer->len; } dev_dbg(&drv_data->pdev->dev, "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n", drv_data->write, chip->write, bfin_spi_null_writer); "transfer: drv_data->write is %p, chip->write is %p\n", drv_data->write, chip->write); /* speed and width has been set on per message */ message->state = RUNNING_STATE; Loading Loading
drivers/spi/spi_bfin5xx.c +5 −42 Original line number Diff line number Diff line Loading @@ -255,43 +255,6 @@ static inline void bfin_spi_dummy_read(struct driver_data *drv_data) (void) read_RDBR(drv_data); } static void bfin_spi_null_writer(struct driver_data *drv_data) { u8 n_bytes = drv_data->n_bytes; u16 tx_val = drv_data->cur_chip->idle_tx_val; /* clear RXS (we check for RXS inside the loop) */ bfin_spi_dummy_read(drv_data); while (drv_data->tx < drv_data->tx_end) { write_TDBR(drv_data, tx_val); drv_data->tx += n_bytes; /* wait until transfer finished. checking SPIF or TXS may not guarantee transfer completion */ while (!(read_STAT(drv_data) & BIT_STAT_RXS)) cpu_relax(); /* discard RX data and clear RXS */ bfin_spi_dummy_read(drv_data); } } static void bfin_spi_null_reader(struct driver_data *drv_data) { u8 n_bytes = drv_data->n_bytes; u16 tx_val = drv_data->cur_chip->idle_tx_val; /* discard old RX data and clear RXS */ bfin_spi_dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { write_TDBR(drv_data, tx_val); drv_data->rx += n_bytes; while (!(read_STAT(drv_data) & BIT_STAT_RXS)) cpu_relax(); bfin_spi_dummy_read(drv_data); } } static void bfin_spi_u8_writer(struct driver_data *drv_data) { /* clear RXS (we check for RXS inside the loop) */ Loading Loading @@ -680,9 +643,9 @@ static void bfin_spi_pump_transfers(unsigned long data) transfer->bits_per_word = chip->bits_per_word; drv_data->n_bytes = chip->n_bytes; width = chip->width; drv_data->write = drv_data->tx ? chip->write : bfin_spi_null_writer; drv_data->read = drv_data->rx ? chip->read : bfin_spi_null_reader; drv_data->duplex = chip->duplex ? chip->duplex : bfin_spi_null_writer; drv_data->write = chip->write; drv_data->read = chip->read; drv_data->duplex = chip->duplex; break; } cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); Loading @@ -695,8 +658,8 @@ static void bfin_spi_pump_transfers(unsigned long data) drv_data->len = transfer->len; } dev_dbg(&drv_data->pdev->dev, "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n", drv_data->write, chip->write, bfin_spi_null_writer); "transfer: drv_data->write is %p, chip->write is %p\n", drv_data->write, chip->write); /* speed and width has been set on per message */ message->state = RUNNING_STATE; Loading