Commit 5cf482f2 authored by Yong Wu's avatar Yong Wu Committed by Will Deacon
Browse files

dt-bindings: memory: mediatek: Add a common memory header file 



Put all the macros about smi larb/port togethers.

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: default avatarTomasz Figa <tfiga@chromium.org>
Link: https://lore.kernel.org/r/20210111111914.22211-3-yong.wu@mediatek.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent bca28426

include/dt-bindings/memory/mt2712-larb-port.h

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@@ -6,7 +6,7 @@ 
#ifndef __DTS_IOMMU_PORT_MT2712_H

#define __DTS_IOMMU_PORT_MT2712_H



#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))

#include <dt-bindings/memory/mtk-memory-port.h>



#define M4U_LARB0_ID			0

#define M4U_LARB1_ID			1

include/dt-bindings/memory/mt6779-larb-port.h

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@@ -7,7 +7,7 @@ 
#ifndef _DTS_IOMMU_PORT_MT6779_H_

#define _DTS_IOMMU_PORT_MT6779_H_



#define MTK_M4U_ID(larb, port)		 (((larb) << 5) | (port))

#include <dt-bindings/memory/mtk-memory-port.h>



#define M4U_LARB0_ID			 0

#define M4U_LARB1_ID			 1

include/dt-bindings/memory/mt8167-larb-port.h

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@@ -8,7 +8,7 @@ 
#ifndef __DTS_IOMMU_PORT_MT8167_H

#define __DTS_IOMMU_PORT_MT8167_H



#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))

#include <dt-bindings/memory/mtk-memory-port.h>



#define M4U_LARB0_ID			0

#define M4U_LARB1_ID			1

include/dt-bindings/memory/mt8173-larb-port.h

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@@ -6,7 +6,7 @@ 
#ifndef __DTS_IOMMU_PORT_MT8173_H

#define __DTS_IOMMU_PORT_MT8173_H



#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))

#include <dt-bindings/memory/mtk-memory-port.h>



#define M4U_LARB0_ID			0

#define M4U_LARB1_ID			1

include/dt-bindings/memory/mt8183-larb-port.h

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@@ -6,7 +6,7 @@ 
#ifndef __DTS_IOMMU_PORT_MT8183_H

#define __DTS_IOMMU_PORT_MT8183_H



#define MTK_M4U_ID(larb, port)		(((larb) << 5) | (port))

#include <dt-bindings/memory/mtk-memory-port.h>



#define M4U_LARB0_ID			0

#define M4U_LARB1_ID			1