Commit 5d7de61f authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3



Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2LC SMARC
EVK.

The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when
PMOD_MTU3 macro is enabled.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230707155849.86649-1-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 10ca61c6
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+12 −0
Original line number Diff line number Diff line
@@ -35,6 +35,18 @@
/* comment the #define statement to disable SCIF1 (SER0) on PMOD1 (CN7) */
#define PMOD1_SER0	1

/*
 * To enable MTU3a PWM on PMOD0,
 *  - Set DIP-Switch SW1-4 to Off position.
 *  - Set SW_RSPI_CAN macro to 0.
 *  - Set PMOD_MTU3 macro to 1.
 */
#define PMOD_MTU3	0

#if (PMOD_MTU3 && SW_RSPI_CAN)
#error "Cannot set as both PMOD_MTU3 and SW_RSPI_CAN are mutually exclusive"
#endif

#include "r9a07g044c2.dtsi"
#include "rzg2lc-smarc-som.dtsi"
#include "rzg2lc-smarc.dtsi"
+9 −0
Original line number Diff line number Diff line
@@ -50,6 +50,15 @@ i2c2_pins: i2c2 {
			 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
	};

	mtu3_pins: mtu3 {
		mtu3-pwm {
			pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
				 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
				 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
				 <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
		};
	};

	scif0_pins: scif0 {
		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
+13 −1
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@
#include "rzg2lc-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"


/ {
	aliases {
		serial1 = &scif1;
@@ -129,6 +128,19 @@ wm8978: codec@1a {
	};
};

#if PMOD_MTU3
&mtu3 {
	pinctrl-0 = <&mtu3_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&spi1 {
	status = "disabled";
};
#endif

/*
 * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
 * SW1 should be at position 2->3 so that SER0_CTS# line is activated