Commit 60c9579a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-5.12' of... 

Merge tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.12:

- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
  Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
  Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
  more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
  Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
  regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
  LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
  pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
  constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
  LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.

* tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
  arm64: dts: imx: Add i.mx8mm nitrogen basic dts support
  arm64: dts: zii-rmb3: enable RMI4 reduced reporting
  arm64: dts: zii-ultra: only trigger IRQ on falling edge ucs1002 ALERT pin
  arm64: dts: zii-ultra: limit USB ports to USB2 speed
  arm64: dts: zii-ultra: fix i2c pin configuration
  arm64: dts: zii-ultra: add sound support
  arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDS
  arm64: dts: ls1028a: Update flexcan properties
  arm64: dts: lx2160a: Add flexcan support
  arm64: dts: fsl-ls1012a-frdm: add spi-uart device
  arm64: dts: fsl-ls1012a-rdb: add i2c devices
  arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
  arm64: dts: imx8mn: Add fspi node
  arm64: dts: Add Librem5 Evergreen
  arm64: dts: imx8mq-librem5: set regulators boot-on
  arm64: dts: imx8mq-librem5: enable the LCD panel
  arm64: dts: imx8mq-librem5: Add LCD_1V8 regulator
  arm64: dts: imx8mq-librem5: Add usb-c chip as supplier for the charger
  arm64: dts: imx8mq-librem5: Don't mark buck3 as always on
  arm64: dts: imx8mq-librem5: Mark charger IRQ as High-Z
  ...

Link: https://lore.kernel.org/r/20210204120150.26186-5-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 48a60549 da1a6b8b

arch/arm64/boot/dts/freescale/Makefile

+8 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb 
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb
@@ -33,16 +34,23 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r4.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-phanbell.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb

arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts

+21 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 */

/dts-v1/;



#include <dt-bindings/interrupt-controller/irq.h>

#include "fsl-ls1012a.dtsi"



/ {
@@ -57,6 +58,26 @@ simple-audio-card,codec { 
	};

};



&dspi {

	bus-num = <0>;

	status = "okay";



	serial@0 {

		compatible = "nxp,sc16is740";

		reg = <0>;

		spi-max-frequency = <4000000>;

		clocks = <&sc16is7xx_clk>;

		interrupt-parent = <&gpio1>;

		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;



		sc16is7xx_clk: clock-sc16is7xx {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <24000000>;

		};

	};

};



&duart0 {

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts

+5 −0
Original line number Diff line number Diff line
@@ -13,6 +13,11 @@ / { 
	model = "LS1012A QDS Board";

	compatible = "fsl,ls1012a-qds", "fsl,ls1012a";



	aliases {

		mmc0 = &esdhc0;

		mmc1 = &esdhc1;

	};



	sys_mclk: clock-mclk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts

+50 −0
Original line number Diff line number Diff line
@@ -7,11 +7,17 @@ 
 */

/dts-v1/;



#include <dt-bindings/interrupt-controller/irq.h>

#include "fsl-ls1012a.dtsi"



/ {

	model = "LS1012A RDB Board";

	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";



	aliases {

		mmc0 = &esdhc0;

		mmc1 = &esdhc1;

	};

};



&duart0 {
@@ -33,6 +39,50 @@ &esdhc1 { 


&i2c0 {

	status = "okay";



	accelerometer@1e {

		compatible = "nxp,fxos8700";

		reg = <0x1e>;

		interrupt-parent = <&gpio26>;

		interrupts = <13 IRQ_TYPE_EDGE_RISING>;

		interrupt-names = "INT1";

	};



	gyroscope@20 {

		compatible = "nxp,fxas21002c";

		reg = <0x20>;

	};



	gpio@24 {

		compatible = "nxp,pcal9555a";

		reg = <0x24>;

		gpio-controller;

		#gpio-cells = <2>;

	};



	gpio@25 {

		compatible = "nxp,pcal9555a";

		reg = <0x25>;

		gpio-controller;

		#gpio-cells = <2>;

	};



	gpio26: gpio@26 {

		compatible = "nxp,pcal9555a";

		reg = <0x26>;

		interrupt-parent = <&gpio0>;

		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;

		interrupt-controller;

		#interrupt-cells = <2>;

		gpio-controller;

		#gpio-cells = <2>;

	};



	current-sensor@40 {

		compatible = "ti,ina220";

		reg = <0x40>;

		shunt-resistor = <2000>;

	};

};



&qspi {

arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

+43 −17
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 *

 */



#include <dt-bindings/clock/fsl,qoriq-clockgen.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/thermal/thermal.h>
@@ -34,7 +35,7 @@ cpu0: cpu@0 { 
			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x0>;

			clocks = <&clockgen 1 0>;

			clocks = <&clockgen QORIQ_CLK_CMUX 0>;

			#cooling-cells = <2>;

			cpu-idle-states = <&CPU_PH20>;

		};
@@ -148,7 +149,10 @@ qspi: spi@1550000 { 
			reg-names = "QuadSPI", "QuadSPI-memory";

			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "qspi_en", "qspi";

			clocks = <&clockgen 4 0>, <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			status = "disabled";

		};
@@ -156,7 +160,8 @@ esdhc0: esdhc@1560000 { 
			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";

			reg = <0x0 0x1560000 0x0 0x10000>;

			interrupts = <0 62 0x4>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;
@@ -174,7 +179,8 @@ esdhc1: esdhc@1580000 { 
			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";

			reg = <0x0 0x1580000 0x0 0x10000>;

			interrupts = <0 65 0x4>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;
@@ -341,7 +347,8 @@ i2c0: i2c@2180000 { 
			#size-cells = <0>;

			reg = <0x0 0x2180000 0x0 0x10000>;

			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 3>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			status = "disabled";

		};
@@ -351,7 +358,8 @@ i2c1: i2c@2190000 { 
			#size-cells = <0>;

			reg = <0x0 0x2190000 0x0 0x10000>;

			interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 3>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			status = "disabled";

		};
@@ -362,7 +370,8 @@ dspi: spi@2100000 { 
			reg = <0x0 0x2100000 0x0 0x10000>;

			interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			spi-num-chipselects = <5>;

			big-endian;

			status = "disabled";
@@ -372,7 +381,8 @@ duart0: serial@21c0500 { 
			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0500 0x0 0x100>;

			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			status = "disabled";

		};
@@ -380,7 +390,8 @@ duart1: serial@21c0600 { 
			compatible = "fsl,ns16550", "ns16550a";

			reg = <0x00 0x21c0600 0x0 0x100>;

			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			status = "disabled";

		};
@@ -409,7 +420,7 @@ wdog0: watchdog@2ad0000 { 
				     "fsl,imx21-wdt";

			reg = <0x0 0x2ad0000 0x0 0x10000>;

			interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>;

			big-endian;

		};
@@ -418,8 +429,14 @@ sai1: sai@2b50000 { 
			compatible = "fsl,vf610-sai";

			reg = <0x0 0x2b50000 0x0 0x10000>;

			interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 3>, <&clockgen 4 3>,

				 <&clockgen 4 3>, <&clockgen 4 3>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			clock-names = "bus", "mclk1", "mclk2", "mclk3";

			dma-names = "tx", "rx";

			dmas = <&edma0 1 47>,
@@ -432,8 +449,14 @@ sai2: sai@2b60000 { 
			compatible = "fsl,vf610-sai";

			reg = <0x0 0x2b60000 0x0 0x10000>;

			interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 3>, <&clockgen 4 3>,

				 <&clockgen 4 3>, <&clockgen 4 3>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

			clock-names = "bus", "mclk1", "mclk2", "mclk3";

			dma-names = "tx", "rx";

			dmas = <&edma0 1 45>,
@@ -453,8 +476,10 @@ edma0: edma@2c00000 { 
			dma-channels = <32>;

			big-endian;

			clock-names = "dmamux0", "dmamux1";

			clocks = <&clockgen 4 3>,

				 <&clockgen 4 3>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>,

				 <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(4)>;

		};



		usb0: usb@2f00000 {
@@ -473,7 +498,8 @@ sata: sata@3200000 { 
				<0x0 0x20140520 0x0 0x4>;

			reg-names = "ahci", "sata-ecc";

			interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 0>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(1)>;

			dma-coherent;

			status = "disabled";

		};