Commit 62792284 authored by Anup Patel's avatar Anup Patel Committed by Marc Zyngier
Browse files

RISC-V: Use IPIs for remote icache flush when possible 



If we have specialized interrupt controller (such as AIA IMSIC) which
allows supervisor mode to directly inject IPIs without any assistance
from M-mode or HS-mode then using such specialized interrupt controller,
we can do remote icache flushe directly from supervisor mode instead of
using the SBI RFENCE calls.

This patch extends remote icache flush functions to use supervisor mode
IPIs whenever direct supervisor mode IPIs.are supported by interrupt
controller.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAtish Patra <atishp@rivosinc.com>
Acked-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-7-apatel@ventanamicro.com
parent 18d2199d

arch/riscv/mm/cacheflush.c

+3 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ void flush_icache_all(void) 
{

	local_flush_icache_all();



	if (IS_ENABLED(CONFIG_RISCV_SBI))

	if (IS_ENABLED(CONFIG_RISCV_SBI) && !riscv_use_ipi_for_rfence())

		sbi_remote_fence_i(NULL);

	else

		on_each_cpu(ipi_remote_fence_i, NULL, 1);
@@ -67,7 +67,8 @@ void flush_icache_mm(struct mm_struct *mm, bool local) 
		 * with flush_icache_deferred().

		 */

		smp_mb();

	} else if (IS_ENABLED(CONFIG_RISCV_SBI)) {

	} else if (IS_ENABLED(CONFIG_RISCV_SBI) &&

		   !riscv_use_ipi_for_rfence()) {

		sbi_remote_fence_i(&others);

	} else {

		on_each_cpu_mask(&others, ipi_remote_fence_i, NULL, 1);