Commit 633b388f authored by Robert Foss's avatar Robert Foss Committed by Mauro Carvalho Chehab
Browse files

media: camss: Refactor VFE HW version support 



In order to support Qualcomm ISP hardware architectures that diverge
from older architectures, the VFE subdevice driver needs to be refactored
to better abstract the different ISP architectures.

Gen1 represents the CAMSS ISP architecture. The ISP architecture developed
after CAMSS, Titan, will be referred to as Gen2.

Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
Reviewed-by: default avatarAndrey Konovalov <andrey.konovalov@linaro.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 9d95baf9

drivers/media/platform/qcom/camss/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ qcom-camss-objs += \ 
		camss-ispif.o \

		camss-vfe-4-1.o \

		camss-vfe-4-7.o \

		camss-vfe-4-8.o \

		camss-vfe-gen1.o \

		camss-vfe.o \

		camss-video.o \

drivers/media/platform/qcom/camss/camss-vfe-4-1.c

+48 −69
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 


#include "camss.h"

#include "camss-vfe.h"

#include "camss-vfe-gen1.h"



#define VFE_0_HW_VERSION		0x000
@@ -284,30 +285,6 @@ static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) 
			1 << VFE_0_BUS_IMAGE_MASTER_n_WR_CFG_FRM_BASED_SHIFT);

}



#define CALC_WORD(width, M, N) (((width) * (M) + (N) - 1) / (N))



static int vfe_word_per_line(u32 format, u32 pixel_per_line)

{

	int val = 0;



	switch (format) {

	case V4L2_PIX_FMT_NV12:

	case V4L2_PIX_FMT_NV21:

	case V4L2_PIX_FMT_NV16:

	case V4L2_PIX_FMT_NV61:

		val = CALC_WORD(pixel_per_line, 1, 8);

		break;

	case V4L2_PIX_FMT_YUYV:

	case V4L2_PIX_FMT_YVYU:

	case V4L2_PIX_FMT_UYVY:

	case V4L2_PIX_FMT_VYUY:

		val = CALC_WORD(pixel_per_line, 2, 8);

		break;

	}



	return val;

}



static void vfe_get_wm_sizes(struct v4l2_pix_format_mplane *pix, u8 plane,

			     u16 *width, u16 *height, u16 *bytesperline)

{
@@ -666,20 +643,6 @@ static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) 
	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);

}



static inline u8 vfe_calc_interp_reso(u16 input, u16 output)

{

	if (input / output >= 16)

		return 0;



	if (input / output >= 8)

		return 1;



	if (input / output >= 4)

		return 2;



	return 3;

}



static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line)

{

	u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat;
@@ -975,46 +938,62 @@ static irqreturn_t vfe_isr(int irq, void *dev) 
	return IRQ_HANDLED;

}



const struct vfe_hw_ops vfe_ops_4_1 = {

	.hw_version_read = vfe_hw_version_read,

static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_1 = {

	.bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,

	.bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,

	.bus_enable_wr_if = vfe_bus_enable_wr_if,

	.bus_reload_wm = vfe_bus_reload_wm,

	.camif_wait_for_stop = vfe_camif_wait_for_stop,

	.enable_irq_common = vfe_enable_irq_common,

	.enable_irq_pix_line = vfe_enable_irq_pix_line,

	.enable_irq_wm_line = vfe_enable_irq_wm_line,

	.get_ub_size = vfe_get_ub_size,

	.global_reset = vfe_global_reset,

	.halt_request = vfe_halt_request,

	.halt_clear = vfe_halt_clear,

	.halt_request = vfe_halt_request,

	.set_camif_cfg = vfe_set_camif_cfg,

	.set_camif_cmd = vfe_set_camif_cmd,

	.set_cgc_override = vfe_set_cgc_override,

	.set_clamp_cfg = vfe_set_clamp_cfg,

	.set_crop_cfg = vfe_set_crop_cfg,

	.set_demux_cfg = vfe_set_demux_cfg,

	.set_ds = vfe_set_ds,

	.set_module_cfg = vfe_set_module_cfg,

	.set_qos = vfe_set_qos,

	.set_rdi_cid = vfe_set_rdi_cid,

	.set_realign_cfg = vfe_set_realign_cfg,

	.set_scale_cfg = vfe_set_scale_cfg,

	.set_xbar_cfg = vfe_set_xbar_cfg,

	.wm_enable = vfe_wm_enable,

	.wm_frame_based = vfe_wm_frame_based,

	.wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,

	.wm_line_based = vfe_wm_line_based,

	.wm_set_framedrop_period = vfe_wm_set_framedrop_period,

	.wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern,

	.wm_set_ub_cfg = vfe_wm_set_ub_cfg,

	.bus_reload_wm = vfe_bus_reload_wm,

	.wm_set_framedrop_period = vfe_wm_set_framedrop_period,

	.wm_set_ping_addr = vfe_wm_set_ping_addr,

	.wm_set_pong_addr = vfe_wm_set_pong_addr,

	.wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,

	.bus_enable_wr_if = vfe_bus_enable_wr_if,

	.bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,

	.wm_set_subsample = vfe_wm_set_subsample,

	.bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,

	.set_xbar_cfg = vfe_set_xbar_cfg,

	.set_realign_cfg = vfe_set_realign_cfg,

	.set_rdi_cid = vfe_set_rdi_cid,

	.reg_update = vfe_reg_update,

	.reg_update_clear = vfe_reg_update_clear,

	.enable_irq_wm_line = vfe_enable_irq_wm_line,

	.enable_irq_pix_line = vfe_enable_irq_pix_line,

	.enable_irq_common = vfe_enable_irq_common,

	.set_demux_cfg = vfe_set_demux_cfg,

	.set_scale_cfg = vfe_set_scale_cfg,

	.set_crop_cfg = vfe_set_crop_cfg,

	.set_clamp_cfg = vfe_set_clamp_cfg,

	.set_qos = vfe_set_qos,

	.set_ds = vfe_set_ds,

	.set_cgc_override = vfe_set_cgc_override,

	.set_camif_cfg = vfe_set_camif_cfg,

	.set_camif_cmd = vfe_set_camif_cmd,

	.set_module_cfg = vfe_set_module_cfg,

	.camif_wait_for_stop = vfe_camif_wait_for_stop,

	.wm_set_ub_cfg = vfe_wm_set_ub_cfg,

};



static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)

{

	vfe->isr_ops = vfe_isr_ops_gen1;

	vfe->ops_gen1 = &vfe_ops_gen1_4_1;

	vfe->video_ops = vfe_video_ops_gen1;



	vfe->line_num = VFE_LINE_NUM_GEN1;

}



const struct vfe_hw_ops vfe_ops_4_1 = {

	.global_reset = vfe_global_reset,

	.hw_version_read = vfe_hw_version_read,

	.isr_read = vfe_isr_read,

	.violation_read = vfe_violation_read,

	.isr = vfe_isr,

	.reg_update_clear = vfe_reg_update_clear,

	.reg_update = vfe_reg_update,

	.subdev_init = vfe_subdev_init,

	.vfe_disable = vfe_gen1_disable,

	.vfe_enable = vfe_gen1_enable,

	.vfe_halt = vfe_gen1_halt,

	.violation_read = vfe_violation_read,

};

drivers/media/platform/qcom/camss/camss-vfe-4-7.c

+78 −163
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@ 


#include "camss.h"

#include "camss-vfe.h"

#include "camss-vfe-gen1.h"





#define VFE_0_HW_VERSION		0x000
@@ -258,7 +260,7 @@ static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev) 
	dev_err(dev, "VFE HW Version = 0x%08x\n", hw_version);

}



static u16 vfe47_get_ub_size(u8 vfe_id)

static u16 vfe_get_ub_size(u8 vfe_id)

{

	if (vfe_id == 0)

		return MSM_VFE_VFE0_UB_SIZE_RDI;
@@ -296,6 +298,8 @@ static void vfe_global_reset(struct vfe_device *vfe) 
			 VFE_0_GLOBAL_RESET_CMD_CORE;



	writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0);



	/* Enforce barrier between IRQ mask setup and global reset */

	wmb();

	writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);

}
@@ -311,7 +315,7 @@ static void vfe_halt_clear(struct vfe_device *vfe) 
	writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);

}



static void vfe47_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)

static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)

{

	if (enable)

		vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),
@@ -460,8 +464,12 @@ static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm, 


static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm)

{

	/* Enforce barrier between any outstanding register write */

	wmb();



	writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);



	/* Use barrier to make sure bus reload is issued before anything else */

	wmb();

}
@@ -675,8 +683,12 @@ static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid) 
static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)

{

	vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id);



	/* Enforce barrier between line update and commit */

	wmb();

	writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);



	/* Make sure register update is issued before further reg writes */

	wmb();

}
@@ -780,20 +792,6 @@ static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line) 
	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);

}



static inline u8 vfe_calc_interp_reso(u16 input, u16 output)

{

	if (input / output >= 16)

		return 0;



	if (input / output >= 8)

		return 1;



	if (input / output >= 4)

		return 2;



	return 3;

}



static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line)

{

	u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat;
@@ -895,7 +893,7 @@ static void vfe_set_clamp_cfg(struct vfe_device *vfe) 
	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);

}



static void vfe47_set_qos(struct vfe_device *vfe)

static void vfe_set_qos(struct vfe_device *vfe)

{

	u32 val = VFE_0_BUS_BDG_QOS_CFG_0_CFG;

	u32 val7 = VFE_0_BUS_BDG_QOS_CFG_7_CFG;
@@ -910,7 +908,7 @@ static void vfe47_set_qos(struct vfe_device *vfe) 
	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);

}



static void vfe47_set_ds(struct vfe_device *vfe)

static void vfe_set_ds(struct vfe_device *vfe)

{

	u32 val = VFE_0_BUS_BDG_DS_CFG_0_CFG;

	u32 val16 = VFE_0_BUS_BDG_DS_CFG_16_CFG;
@@ -994,6 +992,8 @@ static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) 


	cmd = VFE_0_CAMIF_CMD_CLEAR_CAMIF_STATUS | VFE_0_CAMIF_CMD_NO_CHANGE;

	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);



	/* Make sure camif command is issued written before it is changed again */

	wmb();



	if (enable)
@@ -1036,24 +1036,7 @@ static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev) 
	return ret;

}



static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1)

{

	*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);

	*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);



	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);

	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);



	wmb();

	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);

}



static void vfe_violation_read(struct vfe_device *vfe)

{

	u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);



	pr_err_ratelimited("VFE: violation = 0x%08x\n", violation);

}



/*

 * vfe_isr - VFE module interrupt handler
@@ -1082,7 +1065,7 @@ static irqreturn_t vfe_isr(int irq, void *dev) 
	if (value1 & VFE_0_IRQ_STATUS_1_BUS_BDG_HALT_ACK)

		vfe->isr_ops.halt_ack(vfe);



	for (i = VFE_LINE_RDI0; i <= VFE_LINE_PIX; i++)

	for (i = VFE_LINE_RDI0; i < vfe->line_num; i++)

		if (value0 & VFE_0_IRQ_STATUS_0_line_n_REG_UPDATE(i))

			vfe->isr_ops.reg_update(vfe, i);
@@ -1108,150 +1091,82 @@ static irqreturn_t vfe_isr(int irq, void *dev) 
	return IRQ_HANDLED;

}



const struct vfe_hw_ops vfe_ops_4_7 = {

	.hw_version_read = vfe_hw_version_read,

	.get_ub_size = vfe47_get_ub_size,

	.global_reset = vfe_global_reset,

	.halt_request = vfe_halt_request,

	.halt_clear = vfe_halt_clear,

	.wm_enable = vfe47_wm_enable,

	.wm_frame_based = vfe_wm_frame_based,

	.wm_line_based = vfe_wm_line_based,

	.wm_set_framedrop_period = vfe_wm_set_framedrop_period,

	.wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern,

	.wm_set_ub_cfg = vfe_wm_set_ub_cfg,

	.bus_reload_wm = vfe_bus_reload_wm,

	.wm_set_ping_addr = vfe_wm_set_ping_addr,

	.wm_set_pong_addr = vfe_wm_set_pong_addr,

	.wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,

	.bus_enable_wr_if = vfe_bus_enable_wr_if,

	.bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,

	.wm_set_subsample = vfe_wm_set_subsample,

	.bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,

	.set_xbar_cfg = vfe_set_xbar_cfg,

	.set_realign_cfg = vfe_set_realign_cfg,

	.set_rdi_cid = vfe_set_rdi_cid,

	.reg_update = vfe_reg_update,

	.reg_update_clear = vfe_reg_update_clear,

	.enable_irq_wm_line = vfe_enable_irq_wm_line,

	.enable_irq_pix_line = vfe_enable_irq_pix_line,

	.enable_irq_common = vfe_enable_irq_common,

	.set_demux_cfg = vfe_set_demux_cfg,

	.set_scale_cfg = vfe_set_scale_cfg,

	.set_crop_cfg = vfe_set_crop_cfg,

	.set_clamp_cfg = vfe_set_clamp_cfg,

	.set_qos = vfe47_set_qos,

	.set_ds = vfe47_set_ds,

	.set_cgc_override = vfe_set_cgc_override,

	.set_camif_cfg = vfe_set_camif_cfg,

	.set_camif_cmd = vfe_set_camif_cmd,

	.set_module_cfg = vfe_set_module_cfg,

	.camif_wait_for_stop = vfe_camif_wait_for_stop,

	.isr_read = vfe_isr_read,

	.violation_read = vfe_violation_read,

	.isr = vfe_isr,

};



static u16 vfe48_get_ub_size(u8 vfe_id)

static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1)

{

	/* On VFE4.8 the ub-size is the same on both instances */

	return MSM_VFE_VFE0_UB_SIZE_RDI;

}

	*value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);

	*value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);



static void vfe48_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)

{

	if (enable)

		writel_relaxed(2 << VFE48_0_BUS_IMAGE_MASTER_n_SHIFT(wm),

			       vfe->base + VFE48_0_BUS_IMAGE_MASTER_CMD);

	else

		writel_relaxed(1 << VFE48_0_BUS_IMAGE_MASTER_n_SHIFT(wm),

			       vfe->base + VFE48_0_BUS_IMAGE_MASTER_CMD);

	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);

	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);



	/* The WM must be enabled before sending other commands */

	/* Enforce barrier between local & global IRQ clear */

	wmb();

	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);

}



static void vfe48_set_qos(struct vfe_device *vfe)

{

	u32 val = VFE48_0_BUS_BDG_QOS_CFG_0_CFG;

	u32 val3 = VFE48_0_BUS_BDG_QOS_CFG_3_CFG;

	u32 val4 = VFE48_0_BUS_BDG_QOS_CFG_4_CFG;

	u32 val7 = VFE48_0_BUS_BDG_QOS_CFG_7_CFG;



	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);

	writel_relaxed(val3, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);

	writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);

	writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);

	writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);

	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);

}



static void vfe48_set_ds(struct vfe_device *vfe)

static void vfe_violation_read(struct vfe_device *vfe)

{

	u32 val = VFE48_0_BUS_BDG_DS_CFG_0_CFG;

	u32 val16 = VFE48_0_BUS_BDG_DS_CFG_16_CFG;

	u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);



	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14);

	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15);

	writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16);

	pr_err_ratelimited("VFE: violation = 0x%08x\n", violation);

}



const struct vfe_hw_ops vfe_ops_4_8 = {

	.hw_version_read = vfe_hw_version_read,

	.get_ub_size = vfe48_get_ub_size,

	.global_reset = vfe_global_reset,

	.halt_request = vfe_halt_request,

static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_7 = {

	.bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,

	.bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,

	.bus_enable_wr_if = vfe_bus_enable_wr_if,

	.bus_reload_wm = vfe_bus_reload_wm,

	.camif_wait_for_stop = vfe_camif_wait_for_stop,

	.enable_irq_common = vfe_enable_irq_common,

	.enable_irq_pix_line = vfe_enable_irq_pix_line,

	.enable_irq_wm_line = vfe_enable_irq_wm_line,

	.get_ub_size = vfe_get_ub_size,

	.halt_clear = vfe_halt_clear,

	.wm_enable = vfe48_wm_enable,

	.halt_request = vfe_halt_request,

	.set_camif_cfg = vfe_set_camif_cfg,

	.set_camif_cmd = vfe_set_camif_cmd,

	.set_cgc_override = vfe_set_cgc_override,

	.set_clamp_cfg = vfe_set_clamp_cfg,

	.set_crop_cfg = vfe_set_crop_cfg,

	.set_demux_cfg = vfe_set_demux_cfg,

	.set_ds = vfe_set_ds,

	.set_module_cfg = vfe_set_module_cfg,

	.set_qos = vfe_set_qos,

	.set_rdi_cid = vfe_set_rdi_cid,

	.set_realign_cfg = vfe_set_realign_cfg,

	.set_scale_cfg = vfe_set_scale_cfg,

	.set_xbar_cfg = vfe_set_xbar_cfg,

	.wm_enable = vfe_wm_enable,

	.wm_frame_based = vfe_wm_frame_based,

	.wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,

	.wm_line_based = vfe_wm_line_based,

	.wm_set_framedrop_period = vfe_wm_set_framedrop_period,

	.wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern,

	.wm_set_ub_cfg = vfe_wm_set_ub_cfg,

	.bus_reload_wm = vfe_bus_reload_wm,

	.wm_set_framedrop_period = vfe_wm_set_framedrop_period,

	.wm_set_ping_addr = vfe_wm_set_ping_addr,

	.wm_set_pong_addr = vfe_wm_set_pong_addr,

	.wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,

	.bus_enable_wr_if = vfe_bus_enable_wr_if,

	.bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,

	.wm_set_subsample = vfe_wm_set_subsample,

	.bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,

	.set_xbar_cfg = vfe_set_xbar_cfg,

	.set_realign_cfg = vfe_set_realign_cfg,

	.set_rdi_cid = vfe_set_rdi_cid,

	.reg_update = vfe_reg_update,

	.reg_update_clear = vfe_reg_update_clear,

	.enable_irq_wm_line = vfe_enable_irq_wm_line,

	.enable_irq_pix_line = vfe_enable_irq_pix_line,

	.enable_irq_common = vfe_enable_irq_common,

	.set_demux_cfg = vfe_set_demux_cfg,

	.set_scale_cfg = vfe_set_scale_cfg,

	.set_crop_cfg = vfe_set_crop_cfg,

	.set_clamp_cfg = vfe_set_clamp_cfg,

	.set_qos = vfe48_set_qos,

	.set_ds = vfe48_set_ds,

	.set_cgc_override = vfe_set_cgc_override,

	.set_camif_cfg = vfe_set_camif_cfg,

	.set_camif_cmd = vfe_set_camif_cmd,

	.set_module_cfg = vfe_set_module_cfg,

	.camif_wait_for_stop = vfe_camif_wait_for_stop,

	.wm_set_ub_cfg = vfe_wm_set_ub_cfg,

};



static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)

{

	vfe->isr_ops = vfe_isr_ops_gen1;

	vfe->ops_gen1 = &vfe_ops_gen1_4_7;

	vfe->video_ops = vfe_video_ops_gen1;



	vfe->line_num = VFE_LINE_NUM_GEN1;

}



const struct vfe_hw_ops vfe_ops_4_7 = {

	.global_reset = vfe_global_reset,

	.hw_version_read = vfe_hw_version_read,

	.isr_read = vfe_isr_read,

	.violation_read = vfe_violation_read,

	.isr = vfe_isr,

	.reg_update_clear = vfe_reg_update_clear,

	.reg_update = vfe_reg_update,

	.subdev_init = vfe_subdev_init,

	.vfe_disable = vfe_gen1_disable,

	.vfe_enable = vfe_gen1_enable,

	.vfe_halt = vfe_gen1_halt,

	.violation_read = vfe_violation_read,

};

drivers/media/platform/qcom/camss/camss-vfe-4-8.c

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drivers/media/platform/qcom/camss/camss-vfe-gen1.c

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