Commit 6349c162 authored by Fabien Poussin's avatar Fabien Poussin Committed by Linus Walleij
Browse files

pinctrl: sunxi: d1: Add CAN bus pinmuxes 



The D1 pin controller contains muxes for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the pin controller
is the same across all SoC variants.

Signed-off-by: default avatarFabien Poussin <fabien.poussin@gmail.com>
Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221126191636.6673-1-samuel@sholland.org


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 7ebfe10e

drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c

+4 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ static const struct sunxi_desc_pin d1_pins[] = { 
		SUNXI_FUNCTION(0x5, "i2s2_din"),	/* DIN2 */

		SUNXI_FUNCTION(0x6, "lcd0"),		/* D18 */

		SUNXI_FUNCTION(0x7, "uart4"),		/* TX */

		SUNXI_FUNCTION(0x8, "can0"),		/* TX */

		SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 2)),

	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),

		SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -57,6 +58,7 @@ static const struct sunxi_desc_pin d1_pins[] = { 
		SUNXI_FUNCTION(0x5, "i2s2_din"),	/* DIN0 */

		SUNXI_FUNCTION(0x6, "lcd0"),		/* D19 */

		SUNXI_FUNCTION(0x7, "uart4"),		/* RX */

		SUNXI_FUNCTION(0x8, "can0"),		/* RX */

		SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 3)),

	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),

		SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -67,6 +69,7 @@ static const struct sunxi_desc_pin d1_pins[] = { 
		SUNXI_FUNCTION(0x5, "i2s2_din"),	/* DIN1 */

		SUNXI_FUNCTION(0x6, "lcd0"),		/* D20 */

		SUNXI_FUNCTION(0x7, "uart5"),		/* TX */

		SUNXI_FUNCTION(0x8, "can1"),		/* TX */

		SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 4)),

	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),

		SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -77,6 +80,7 @@ static const struct sunxi_desc_pin d1_pins[] = { 
		SUNXI_FUNCTION(0x5, "pwm0"),

		SUNXI_FUNCTION(0x6, "lcd0"),		/* D21 */

		SUNXI_FUNCTION(0x7, "uart5"),		/* RX */

		SUNXI_FUNCTION(0x8, "can1"),		/* RX */

		SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 5)),

	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),

		SUNXI_FUNCTION(0x0, "gpio_in"),