Loading arch/arm/mach-s5pc100/clock.c +1 −36 Original line number Diff line number Diff line Loading @@ -910,47 +910,12 @@ struct clksrc_sources clk_src_sclk_spdif = { .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), }; static int s5pc100_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } static unsigned long s5pc100_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } static struct clk_ops s5pc100_sclk_spdif_ops = { .set_rate = s5pc100_spdif_set_rate, .get_rate = s5pc100_spdif_get_rate, }; static struct clksrc_clk clk_sclk_spdif = { .clk = { .name = "sclk_spdif", .ctrlbit = (1 << 11), .enable = s5pc100_sclk1_ctrl, .ops = &s5pc100_sclk_spdif_ops, .ops = &s5p_sclk_spdif_ops, }, .sources = &clk_src_sclk_spdif, .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 }, Loading arch/arm/mach-s5pv210/clock.c +1 −36 Original line number Diff line number Diff line Loading @@ -686,47 +686,12 @@ static struct clksrc_sources clkset_sclk_spdif = { .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list), }; static int s5pv210_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } static unsigned long s5pv210_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } static struct clk_ops s5pv210_sclk_spdif_ops = { .set_rate = s5pv210_spdif_set_rate, .get_rate = s5pv210_spdif_get_rate, }; static struct clksrc_clk clk_sclk_spdif = { .clk = { .name = "sclk_spdif", .enable = s5pv210_clk_mask0_ctrl, .ctrlbit = (1 << 27), .ops = &s5pv210_sclk_spdif_ops, .ops = &s5p_sclk_spdif_ops, }, .sources = &clkset_sclk_spdif, .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 }, Loading arch/arm/plat-s5p/clock.c +35 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,41 @@ unsigned long s5p_epll_get_rate(struct clk *clk) return clk->rate; } int s5p_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } unsigned long s5p_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } struct clk_ops s5p_sclk_spdif_ops = { .set_rate = s5p_spdif_set_rate, .get_rate = s5p_spdif_get_rate, }; static struct clk *s5p_clks[] __initdata = { &clk_ext_xtal_mux, &clk_48m, Loading arch/arm/plat-s5p/include/plat/s5p-clock.h +5 −0 Original line number Diff line number Diff line Loading @@ -47,4 +47,9 @@ extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); extern int s5p_epll_enable(struct clk *clk, int enable); extern unsigned long s5p_epll_get_rate(struct clk *clk); /* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); extern unsigned long s5p_spdif_get_rate(struct clk *clk); extern struct clk_ops s5p_sclk_spdif_ops; #endif /* __ASM_PLAT_S5P_CLOCK_H */ Loading
arch/arm/mach-s5pc100/clock.c +1 −36 Original line number Diff line number Diff line Loading @@ -910,47 +910,12 @@ struct clksrc_sources clk_src_sclk_spdif = { .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), }; static int s5pc100_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } static unsigned long s5pc100_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } static struct clk_ops s5pc100_sclk_spdif_ops = { .set_rate = s5pc100_spdif_set_rate, .get_rate = s5pc100_spdif_get_rate, }; static struct clksrc_clk clk_sclk_spdif = { .clk = { .name = "sclk_spdif", .ctrlbit = (1 << 11), .enable = s5pc100_sclk1_ctrl, .ops = &s5pc100_sclk_spdif_ops, .ops = &s5p_sclk_spdif_ops, }, .sources = &clk_src_sclk_spdif, .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 }, Loading
arch/arm/mach-s5pv210/clock.c +1 −36 Original line number Diff line number Diff line Loading @@ -686,47 +686,12 @@ static struct clksrc_sources clkset_sclk_spdif = { .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list), }; static int s5pv210_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } static unsigned long s5pv210_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } static struct clk_ops s5pv210_sclk_spdif_ops = { .set_rate = s5pv210_spdif_set_rate, .get_rate = s5pv210_spdif_get_rate, }; static struct clksrc_clk clk_sclk_spdif = { .clk = { .name = "sclk_spdif", .enable = s5pv210_clk_mask0_ctrl, .ctrlbit = (1 << 27), .ops = &s5pv210_sclk_spdif_ops, .ops = &s5p_sclk_spdif_ops, }, .sources = &clkset_sclk_spdif, .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 }, Loading
arch/arm/plat-s5p/clock.c +35 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,41 @@ unsigned long s5p_epll_get_rate(struct clk *clk) return clk->rate; } int s5p_spdif_set_rate(struct clk *clk, unsigned long rate) { struct clk *pclk; int ret; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; ret = pclk->ops->set_rate(pclk, rate); clk_put(pclk); return ret; } unsigned long s5p_spdif_get_rate(struct clk *clk) { struct clk *pclk; int rate; pclk = clk_get_parent(clk); if (IS_ERR(pclk)) return -EINVAL; rate = pclk->ops->get_rate(clk); clk_put(pclk); return rate; } struct clk_ops s5p_sclk_spdif_ops = { .set_rate = s5p_spdif_set_rate, .get_rate = s5p_spdif_get_rate, }; static struct clk *s5p_clks[] __initdata = { &clk_ext_xtal_mux, &clk_48m, Loading
arch/arm/plat-s5p/include/plat/s5p-clock.h +5 −0 Original line number Diff line number Diff line Loading @@ -47,4 +47,9 @@ extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); extern int s5p_epll_enable(struct clk *clk, int enable); extern unsigned long s5p_epll_get_rate(struct clk *clk); /* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); extern unsigned long s5p_spdif_get_rate(struct clk *clk); extern struct clk_ops s5p_sclk_spdif_ops; #endif /* __ASM_PLAT_S5P_CLOCK_H */