Commit 670e2a8b authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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arm64: dts: renesas: r9a09g011: Add USB3 DRD, device and host nodes 



This patch add usb3 host and peripheral device node as child of usb3 drd
node to RZ/V2M SoC dtsi. The host/device needs to issue reset release on
DRD module before accessing host/device registers.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230121145853.4792-11-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fe15c26e

arch/arm64/boot/dts/renesas/r9a09g011.dtsi

+45 −0
Original line number Diff line number Diff line
@@ -117,6 +117,51 @@ emmc: mmc@85020000 { 
			status = "disabled";

		};



		usb3drd: usb3drd@85070400 {

			compatible = "renesas,r9a09g011-usb3drd",

				     "renesas,rzv2m-usb3drd";

			reg = <0x0 0x85070400 0x0 0x100>;

			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,

				      <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,

				      <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "drd", "bc", "gpi";

			clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,

				 <&cpg CPG_MOD R9A09G011_USB_PCLK>;

			clock-names = "axi", "reg";

			resets = <&cpg R9A09G011_USB_DRD_RESET>;

			power-domains = <&cpg>;

			ranges;

			#address-cells = <2>;

			#size-cells = <2>;

			status = "disabled";



			usb3host: usb@85060000 {

				compatible = "renesas,r9a09g011-xhci",

					     "renesas,rzv2m-xhci";

				reg = <0 0x85060000 0 0x2000>;

				interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>,

					 <&cpg CPG_MOD R9A09G011_USB_PCLK>;

				clock-names = "axi", "reg";

				resets = <&cpg R9A09G011_USB_ARESETN_H>;

				power-domains = <&cpg>;

				status = "disabled";

			};



			usb3peri: usb3peri@85070000 {

				compatible = "renesas,r9a09g011-usb3-peri",

					     "renesas,rzv2m-usb3-peri";

				reg = <0x0 0x85070000 0x0 0x400>;

				interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,

					 <&cpg CPG_MOD R9A09G011_USB_PCLK>;

				clock-names = "axi", "reg";

				resets = <&cpg R9A09G011_USB_ARESETN_P>;

				power-domains = <&cpg>;

				status = "disabled";

			};

		};



		avb: ethernet@a3300000 {

			compatible = "renesas,etheravb-r9a09g011","renesas,etheravb-rzv2m";

			reg = <0 0xa3300000 0 0x800>;