Commit 67493ca4 authored by James Clark's avatar James Clark Committed by Mathieu Poirier
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coresight: etm4x: Cleanup TRCBBCTLR register accesses 



This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.

Signed-off-by: default avatarJames Clark <james.clark@arm.com>
Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-15-james.clark@arm.com


Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent 66192082

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

+2 −2
Original line number Diff line number Diff line
@@ -707,10 +707,10 @@ static ssize_t bb_ctrl_store(struct device *dev, 
	 * individual range comparators. If include then at least 1

	 * range must be selected.

	 */

	if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0))

	if ((val & TRCBBCTLR_MODE) && (FIELD_GET(TRCBBCTLR_RANGE_MASK, val) == 0))

		return -EINVAL;



	config->bb_ctrl = val & GENMASK(8, 0);

	config->bb_ctrl = val & (TRCBBCTLR_MODE | TRCBBCTLR_RANGE_MASK);

	return size;

}

static DEVICE_ATTR_RW(bb_ctrl);

drivers/hwtracing/coresight/coresight-etm4x.h

+3 −0
Original line number Diff line number Diff line
@@ -220,6 +220,9 @@ 


#define TRCSSPCICRn_PC_MASK			GENMASK(7, 0)



#define TRCBBCTLR_MODE				BIT(8)

#define TRCBBCTLR_RANGE_MASK			GENMASK(7, 0)



/*

 * System instructions to access ETM registers.

 * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions