Commit 67b8786a authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Mauro Carvalho Chehab
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media: dt-bindings: samsung,exynos4210-csis: convert to dtschema 



Convert the Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI
CSIS) bindings to DT schema.  Changes during conversion - adjust to
existing DTS and Linux driver:
1. Add phys and power-domains.
2. Move samsung,csis-wclk property to the endpoint node.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent 9bc4bc77

Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/media/samsung,exynos4210-csis.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)



maintainers:

  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

  - Sylwester Nawrocki <s.nawrocki@samsung.com>



properties:

  compatible:

    enum:

      - samsung,s5pv210-csis

      - samsung,exynos4210-csis

      - samsung,exynos4212-csis

      - samsung,exynos5250-csis



  reg:

    maxItems: 1



  '#address-cells':

    const: 1



  '#size-cells':

    const: 0



  bus-width:

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [2, 4]

    description:

      Number of data lines supported.



  clocks:

    maxItems: 2



  clock-names:

    items:

      - const: csis

      - const: sclk_csis



  clock-frequency:

    default: 166000000

    description:

      The IP's main (system bus) clock frequency in Hz.



  interrupts:

    maxItems: 1



  phys:

    maxItems: 1



  phy-names:

    items:

      - const: csis



  power-domains:

    maxItems: 1



  vddio-supply:

    description: MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V).



  vddcore-supply:

    description: MIPI CSIS Core voltage supply (e.g. 1.1V).



patternProperties:

  "^port@[34]$":

    $ref: /schemas/graph.yaml#/$defs/port-base

    additionalProperties: false

    description:

      Camera input port.



    properties:

      reg:

        enum: [3, 4]



      endpoint:

        $ref: video-interfaces.yaml#

        unevaluatedProperties: false



        properties:

          data-lanes:

            minItems: 1

            maxItems: 4



          samsung,csis-hs-settle:

            $ref: /schemas/types.yaml#/definitions/uint32

            description: Differential receiver (HS-RX) settle time.



          samsung,csis-wclk:

            type: boolean

            description:

              CSI-2 wrapper clock selection. If this property is present external clock

              from CMU will be used, or the bus clock if it's not specified.



        required:

          - data-lanes



    required:

      - reg



required:

  - compatible

  - reg

  - bus-width

  - clocks

  - clock-names

  - interrupts

  - vddio-supply

  - vddcore-supply



anyOf:

  - required:

      - port@3

  - required:

      - port@4



allOf:

  - if:

      required:

        - samsung,isp-wb

    then:

      required:

        - samsung,sysreg



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/exynos4.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    csis@11890000 {

        compatible = "samsung,exynos4210-csis";

        reg = <0x11890000 0x4000>;

        clocks = <&clock CLK_CSIS1>,

                 <&clock CLK_SCLK_CSIS1>;

        clock-names = "csis", "sclk_csis";

        assigned-clocks = <&clock CLK_MOUT_CSIS1>,

                          <&clock CLK_SCLK_CSIS1>;

        assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;

        assigned-clock-rates = <0>, <176000000>;



        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;



        bus-width = <2>;

        power-domains = <&pd_cam>;

        phys = <&mipi_phy 2>;

        phy-names = "csis";



        vddcore-supply = <&ldo8_reg>;

        vddio-supply = <&ldo10_reg>;



        #address-cells = <1>;

        #size-cells = <0>;



        /* Camera D (4) MIPI CSI-2 (CSIS1) */

        port@4 {

            reg = <4>;



            endpoint {

                remote-endpoint = <&is_s5k6a3_ep>;

                data-lanes = <1>;

                samsung,csis-hs-settle = <18>;

                samsung,csis-wclk;

            };

        };

    };

Documentation/devicetree/bindings/media/samsung-mipi-csis.txt

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Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)

-------------------------------------------------------------



Required properties:



- compatible	  : "samsung,s5pv210-csis" for S5PV210 (S5PC110),

		    "samsung,exynos4210-csis" for Exynos4210 (S5PC210),

		    "samsung,exynos4212-csis" for Exynos4212/Exynos4412,

		    "samsung,exynos5250-csis" for Exynos5250;

- reg		  : offset and length of the register set for the device;

- interrupts      : should contain MIPI CSIS interrupt; the format of the

		    interrupt specifier depends on the interrupt controller;

- bus-width	  : maximum number of data lanes supported (SoC specific);

- vddio-supply    : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);

- vddcore-supply  : MIPI CSIS Core voltage supply (e.g. 1.1V);

- clocks	  : list of clock specifiers, corresponding to entries in

		    clock-names property;

- clock-names	  : must contain "csis", "sclk_csis" entries, matching entries

		    in the clocks property.



Optional properties:



- clock-frequency : The IP's main (system bus) clock frequency in Hz, default

		    value when this property is not specified is 166 MHz;

- samsung,csis-wclk : CSI-2 wrapper clock selection. If this property is present

		    external clock from CMU will be used, or the bus clock if

		    if it's not specified.



The device node should contain one 'port' child node with one child 'endpoint'

node, according to the bindings defined in Documentation/devicetree/bindings/

media/video-interfaces.txt. The following are properties specific to those nodes.



port node

---------



- reg		  : (required) must be 3 for camera C input (CSIS0) or 4 for

		    camera D input (CSIS1);



endpoint node

-------------



- data-lanes	  : (required) an array specifying active physical MIPI-CSI2

		    data input lanes and their mapping to logical lanes; the

		    array's content is unused, only its length is meaningful;



- samsung,csis-hs-settle : (optional) differential receiver (HS-RX) settle time;





Example:



	reg0: regulator@0 {

	};



	reg1: regulator@1 {

	};



/* SoC properties */



	csis_0: csis@11880000 {

		compatible = "samsung,exynos4210-csis";

		reg = <0x11880000 0x1000>;

		interrupts = <0 78 0>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



/* Board properties */



	csis_0: csis@11880000 {

		clock-frequency = <166000000>;

		vddio-supply = <&reg0>;

		vddcore-supply = <&reg1>;

		port {

			reg = <3>; /* 3 - CSIS0, 4 - CSIS1 */

			csis0_ep: endpoint {

				remote-endpoint = <...>;

				data-lanes = <1>, <2>;

				samsung,csis-hs-settle = <12>;

			};

		};

	};

MAINTAINERS

+1 −0
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@@ -18522,6 +18522,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com> 
L:	linux-media@vger.kernel.org

S:	Supported

Q:	https://patchwork.linuxtv.org/project/linux-media/list/

F:	Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml

F:	drivers/media/platform/samsung/exynos4-is/









SAMSUNG SOC CLOCK DRIVERS