Commit 67ec5576 authored by Philipp Hortmann's avatar Philipp Hortmann Committed by Greg Kroah-Hartman
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staging: vt6655: Rename MACvRegBitsOn

parent ee9aded6
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+4 −4
Original line number Diff line number Diff line
@@ -1912,7 +1912,7 @@ bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
	iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR);

	/* turn on REGR */
	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
	vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
	/* W_MAX_TIMEOUT is the timeout period */
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -1957,7 +1957,7 @@ bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
	iowrite8(by_data, iobase + MAC_REG_BBREGDATA);

	/* turn on BBREGCTL_REGW */
	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
	vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
	/* W_MAX_TIMEOUT is the timeout period */
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -2014,7 +2014,7 @@ bool bb_vt3253_init(struct vnt_private *priv)
					byVT3253B0_AGC4_RFMD2959[ii][1]);

			iowrite32(0x23, iobase + MAC_REG_ITRTMSET);
			MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
			vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
		}
		priv->abyBBVGA[0] = 0x18;
		priv->abyBBVGA[1] = 0x0A;
@@ -2054,7 +2054,7 @@ bool bb_vt3253_init(struct vnt_private *priv)
				byVT3253B0_AGC[ii][1]);

		iowrite8(0x23, iobase + MAC_REG_ITRTMSET);
		MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
		vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));

		priv->abyBBVGA[0] = 0x14;
		priv->abyBBVGA[1] = 0x0A;
+6 −8
Original line number Diff line number Diff line
@@ -296,8 +296,7 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
		qwTSFOffset =  le64_to_cpu(qwTSFOffset);
		iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
		iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
		MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL,
			      TFTCTL_TSFSYNCEN);
		vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
	}
	return true;
}
@@ -331,7 +330,7 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv,
	qwNextTBTT =  le64_to_cpu(qwNextTBTT);
	iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
	iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
	MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
	vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);

	return true;
}
@@ -374,8 +373,7 @@ void CARDbRadioPowerOff(struct vnt_private *priv)

	priv->radio_off = true;
	pr_debug("chester power off\n");
	MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0,
		      LED_ACTSET);  /* LED issue */
	vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET);  /* LED issue */
}

void CARDvSafeResetTx(struct vnt_private *priv)
@@ -734,7 +732,7 @@ u64 vt6655_get_current_tsf(struct vnt_private *priv)
	unsigned char data;
	u32 low, high;

	MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
	vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		data = ioread8(iobase + MAC_REG_TFTCTL);
		if (!(data & TFTCTL_TSFCNTRRD))
@@ -800,7 +798,7 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv,
	qwNextTBTT =  le64_to_cpu(qwNextTBTT);
	iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
	iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
	MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
	vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
}

/*
@@ -827,6 +825,6 @@ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
	qwTSF =  le64_to_cpu(qwTSF);
	iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
	iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
	MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
	vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
	pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
}
+1 −1
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch)
	}

	/* clear NAV */
	MACvRegBitsOn(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
	vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);

	/* TX_PE will reserve 3 us for MAX2829 A mode only,
	 * it is for better TX throughput
+4 −5
Original line number Diff line number Diff line
@@ -417,7 +417,7 @@ static void device_init_registers(struct vnt_private *priv)
	CARDvSafeResetTx(priv);

	if (priv->local_id <= REV_ID_VT3253_A1)
		MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
		vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);

	/* Turn On Rx DMA */
	MACvReceive0(priv->port_offset);
@@ -1324,13 +1324,13 @@ static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
	case NL80211_IFTYPE_ADHOC:
		MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);

		MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
		vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);

		break;
	case NL80211_IFTYPE_AP:
		MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);

		MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
		vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);

		break;
	default:
@@ -1476,8 +1476,7 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw,
		if (conf->enable_beacon) {
			vnt_beacon_enable(priv, vif, conf);

			MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
				      TCR_AUTOBCNTX);
			vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
		} else {
			MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
				       TCR_AUTOBCNTX);
+1 −1
Original line number Diff line number Diff line
@@ -537,7 +537,7 @@

/*---------------------  Export Macros ------------------------------*/

#define MACvRegBitsOn(iobase, reg_offset, bit_mask)			\
#define vt6655_mac_reg_bits_on(iobase, reg_offset, bit_mask)		\
do {									\
	unsigned char reg_value;					\
	reg_value = ioread8(iobase + reg_offset);			\
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