Unverified Commit 6932b6ed authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt64-6.3' of... 

Merge tag 'samsung-dt64-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v6.3

1. Add L2 cache properties (Exynos, Tesla FSD).
2. Tesla FSD: add Bosch MCAN (CAN bus), sound card (audio card with
   codec and I2S controllers), system controller nodes.
3. Tesla FSD: correct pin pull up/down properties to match
   recommendation in user manual.
4. Minor cleanups: use dedicated/specific sysreg compatibles, fix
   dtbs_check warnings, drop unsupported properties1

* tag 'samsung-dt64-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: fsd: Add sound card node for Tesla FSD
  arm64: dts: fsd: Add codec node for Tesla FSD
  arm64: dts: fsd: Add I2S DAI node for Tesla FSD
  arm64: dts: exynos: drop unsupported I2C properties in Espresso
  arm64: dts: fsd: fix PUD values as per FSD HW UM
  arm64: dts: exynos: add dedicated SYSREG compatibles to Exynosautov9
  arm64: dts: exynos: add dedicated SYSREG compatibles to Exynos850
  arm64: dts: fsd: add sysreg device node
  arm64: dts: exynos: correct properties of MAX98504 in TM2
  arm64: dts: exynos: drop clock-frequency from CPU nodes in TM2
  arm64: dts: exynos: drop pwm-names from MAX77843 haptic in TM2
  arm64: dts: exynos: use 8-bit for SPI IR LED duty-cycle in TM2
  arm64: dts: exynos: add dedicated SYSREG compatibles to Exynos5433
  arm64: dts: fsd: Add MCAN device node
  arm64: dts: fsd: Update cache properties
  arm64: dts: exynos: Update cache properties

Link: https://lore.kernel.org/r/20230122122605.30720-2-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 65edaea6 56a14f01

arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi

+5 −6
Original line number Diff line number Diff line
@@ -96,10 +96,10 @@ i2c_max98504: i2c-gpio-0 { 
		max98504: amplifier@31 {

			compatible = "maxim,max98504";

			reg = <0x31>;

			maxim,rx-path = <1>;

			maxim,tx-path = <1>;

			maxim,tx-channel-mask = <3>;

			maxim,tx-channel-source = <2>;



			DIOVDD-supply = <&ldo3_reg>;

			DVDD-supply = <&ldo3_reg>;

			/* PVDD-supply to VPH_PWR */

		};

	};
@@ -925,7 +925,6 @@ haptic: motor-driver { 
			compatible = "maxim,max77843-haptic";

			haptic-supply = <&ldo38_reg>;

			pwms = <&pwm 0 33670 0>;

			pwm-names = "haptic";

		};

	};

};
@@ -1315,7 +1314,7 @@ irled@0 { 
		reg = <0x0>;

		spi-max-frequency = <5000000>;

		power-supply = <&irda_regulator>;

		duty-cycle = <60>;

		duty-cycle = /bits/ 8 <60>;

		led-active-low;



		controller-data {

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -89,7 +89,6 @@ cpu0: cpu@100 { 
			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x100>;

			clock-frequency = <1300000000>;

			clocks = <&cmu_apollo CLK_SCLK_APOLLO>;

			clock-names = "apolloclk";

			operating-points-v2 = <&cluster_a53_opp_table>;
@@ -108,7 +107,6 @@ cpu1: cpu@101 { 
			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x101>;

			clock-frequency = <1300000000>;

			operating-points-v2 = <&cluster_a53_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0x8000>;
@@ -125,7 +123,6 @@ cpu2: cpu@102 { 
			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x102>;

			clock-frequency = <1300000000>;

			operating-points-v2 = <&cluster_a53_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0x8000>;
@@ -142,7 +139,6 @@ cpu3: cpu@103 { 
			compatible = "arm,cortex-a53";

			enable-method = "psci";

			reg = <0x103>;

			clock-frequency = <1300000000>;

			operating-points-v2 = <&cluster_a53_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0x8000>;
@@ -159,7 +155,6 @@ cpu4: cpu@0 { 
			compatible = "arm,cortex-a57";

			enable-method = "psci";

			reg = <0x0>;

			clock-frequency = <1900000000>;

			clocks = <&cmu_atlas CLK_SCLK_ATLAS>;

			clock-names = "atlasclk";

			operating-points-v2 = <&cluster_a57_opp_table>;
@@ -178,7 +173,6 @@ cpu5: cpu@1 { 
			compatible = "arm,cortex-a57";

			enable-method = "psci";

			reg = <0x1>;

			clock-frequency = <1900000000>;

			operating-points-v2 = <&cluster_a57_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0xc000>;
@@ -195,7 +189,6 @@ cpu6: cpu@2 { 
			compatible = "arm,cortex-a57";

			enable-method = "psci";

			reg = <0x2>;

			clock-frequency = <1900000000>;

			operating-points-v2 = <&cluster_a57_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0xc000>;
@@ -212,7 +205,6 @@ cpu7: cpu@3 { 
			compatible = "arm,cortex-a57";

			enable-method = "psci";

			reg = <0x3>;

			clock-frequency = <1900000000>;

			operating-points-v2 = <&cluster_a57_opp_table>;

			#cooling-cells = <2>;

			i-cache-size = <0xc000>;
@@ -226,6 +218,8 @@ cpu7: cpu@3 { 


		cluster_a57_l2: l2-cache0 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

			cache-size = <0x200000>;

			cache-line-size = <64>;

			cache-sets = <2048>;
@@ -233,6 +227,8 @@ cluster_a57_l2: l2-cache0 { 


		cluster_a53_l2: l2-cache1 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

			cache-size = <0x40000>;

			cache-line-size = <64>;

			cache-sets = <256>;
@@ -1118,22 +1114,26 @@ hdmiphy: hdmiphy@13af0000 { 
		};



		syscon_disp: syscon@13b80000 {

			compatible = "samsung,exynos5433-sysreg", "syscon";

			compatible = "samsung,exynos5433-disp-sysreg",

				     "samsung,exynos5433-sysreg", "syscon";

			reg = <0x13b80000 0x1010>;

		};



		syscon_cam0: syscon@120f0000 {

			compatible = "samsung,exynos5433-sysreg", "syscon";

			compatible = "samsung,exynos5433-cam0-sysreg",

				     "samsung,exynos5433-sysreg", "syscon";

			reg = <0x120f0000 0x1020>;

		};



		syscon_cam1: syscon@145f0000 {

			compatible = "samsung,exynos5433-sysreg", "syscon";

			compatible = "samsung,exynos5433-cam1-sysreg",

				     "samsung,exynos5433-sysreg", "syscon";

			reg = <0x145f0000 0x1038>;

		};



		syscon_fsys: syscon@156f0000 {

			compatible = "samsung,exynos5433-sysreg", "syscon";

			compatible = "samsung,exynos5433-fsys-sysreg",

				     "samsung,exynos5433-sysreg", "syscon";

			reg = <0x156f0000 0x1044>;

		};

arch/arm64/boot/dts/exynos/exynos7-espresso.dts

+0 −2
Original line number Diff line number Diff line
@@ -83,8 +83,6 @@ &adc { 
};



&hsi2c_4 {

	samsung,i2c-sda-delay = <100>;

	samsung,i2c-max-bus-freq = <200000>;

	status = "okay";



	pmic@66 {

arch/arm64/boot/dts/exynos/exynos7.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -107,6 +107,8 @@ cpu_atlas3: cpu@3 { 


		atlas_l2: l2-cache0 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

			cache-size = <0x200000>;

			cache-line-size = <64>;

			cache-sets = <2048>;

arch/arm64/boot/dts/exynos/exynos850.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -549,13 +549,15 @@ sysmmu_aud: sysmmu@14850000 { 
		};



		sysreg_peri: syscon@10020000 {

			compatible = "samsung,exynos850-sysreg", "syscon";

			compatible = "samsung,exynos850-peri-sysreg",

				     "samsung,exynos850-sysreg", "syscon";

			reg = <0x10020000 0x10000>;

			clocks = <&cmu_peri CLK_GOUT_SYSREG_PERI_PCLK>;

		};



		sysreg_cmgp: syscon@11c20000 {

			compatible = "samsung,exynos850-sysreg", "syscon";

			compatible = "samsung,exynos850-cmgp-sysreg",

				     "samsung,exynos850-sysreg", "syscon";

			reg = <0x11c20000 0x10000>;

			clocks = <&cmu_cmgp CLK_GOUT_SYSREG_CMGP_PCLK>;

		};