Commit 6adbfbab authored by Philippe Boos's avatar Philippe Boos Committed by Wim Van Sebroeck
Browse files

watchdog: meson: keep running if already active 



If the watchdog is already running (e.g.: started by bootloader) then
the kernel driver should keep the watchdog active but the amlogic driver
turns it off.

Let the driver fix the clock rate if already active because we do not
know the previous timebase value. To avoid unintentional resetting we
temporarily set it to its maximum value.

Then keep the enable bit if is was previously active.

Signed-off-by: default avatarPhilippe Boos <pboos@baylibre.com>
Reviewed-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220801092150.4449-1-pboos@baylibre.com


Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent b2462060

drivers/watchdog/meson_gxbb_wdt.c

+19 −5
Original line number Diff line number Diff line
@@ -156,6 +156,7 @@ static int meson_gxbb_wdt_probe(struct platform_device *pdev) 
	struct device *dev = &pdev->dev;

	struct meson_gxbb_wdt *data;

	int ret;

	u32 ctrl_reg;



	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);

	if (!data)
@@ -189,13 +190,26 @@ static int meson_gxbb_wdt_probe(struct platform_device *pdev) 
	watchdog_set_nowayout(&data->wdt_dev, nowayout);

	watchdog_set_drvdata(&data->wdt_dev, data);



	ctrl_reg = readl(data->reg_base + GXBB_WDT_CTRL_REG) &

				GXBB_WDT_CTRL_EN;



	if (ctrl_reg) {

		/* Watchdog is running - keep it running but extend timeout

		 * to the maximum while setting the timebase

		 */

		set_bit(WDOG_HW_RUNNING, &data->wdt_dev.status);

		meson_gxbb_wdt_set_timeout(&data->wdt_dev,

				GXBB_WDT_TCNT_SETUP_MASK / 1000);

	}



	/* Setup with 1ms timebase */

	writel(((clk_get_rate(data->clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |

	ctrl_reg |= ((clk_get_rate(data->clk) / 1000) &

			GXBB_WDT_CTRL_DIV_MASK) |

			GXBB_WDT_CTRL_EE_RESET |

			GXBB_WDT_CTRL_CLK_EN |

		GXBB_WDT_CTRL_CLKDIV_EN,

		data->reg_base + GXBB_WDT_CTRL_REG);

			GXBB_WDT_CTRL_CLKDIV_EN;



	writel(ctrl_reg, data->reg_base + GXBB_WDT_CTRL_REG);

	meson_gxbb_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);



	return devm_watchdog_register_device(dev, &data->wdt_dev);