Unverified Commit 6ae87bab authored by Ranjani Sridharan's avatar Ranjani Sridharan Committed by Mark Brown
Browse files

ASoC: SOF: Intel: MTL: reuse the common ops for PM 



Now that the disabling of interrupts and powering down the DSP has been
abstracted, re-use the common ops for PM for MTL as well.

Signed-off-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: default avatarRander Wang <rander.wang@intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220922213644.666315-10-ranjani.sridharan@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0fbd539f

sound/soc/sof/intel/mtl.c

+0 −150
Original line number Diff line number Diff line
@@ -579,150 +579,6 @@ static int mtl_dsp_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id) 
	return MTL_SRAM_WINDOW_OFFSET(id);

}



static int mtl_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)

{

	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;

	const struct sof_intel_dsp_desc *chip = hda->desc;

#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)

	struct hdac_bus *bus = sof_to_bus(sdev);

#endif

	u32 dsphfdsscs;

	u32 cpa;

	int ret;

	int i;



	mtl_disable_ipc_interrupts(sdev);

	ret = mtl_disable_interrupts(sdev);

	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)

	hda_codec_jack_wake_enable(sdev, runtime_suspend);

	/* power down all hda link */

	snd_hdac_ext_bus_link_power_down_all(bus);

#endif

	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFPWRCTL,

				MTL_HFPWRCTL_WPDSPHPXPG, 0);



	/* Set the DSP subsystem power down */

	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFDSSCS,

				MTL_HFDSSCS_SPA_MASK, 0);



	/* Wait for unstable CPA read (1 then 0 then 1) just after setting SPA bit */

	usleep_range(1000, 1010);



	/* poll with timeout to check if operation successful */

	cpa = MTL_HFDSSCS_CPA_MASK;

	dsphfdsscs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFDSSCS);

	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_HFDSSCS, dsphfdsscs,

					    (dsphfdsscs & cpa) == 0, HDA_DSP_REG_POLL_INTERVAL_US,

					HDA_DSP_RESET_TIMEOUT_US);

	if (ret < 0)

		dev_err(sdev->dev, "failed to disable DSP subsystem\n");



	/* reset ref counts for all cores */

	for (i = 0; i < chip->cores_num; i++)

		sdev->dsp_core_ref_count[i] = 0;



	/* TODO: need to reset controller? */



	/* display codec can be powered off after link reset */

	hda_codec_i915_display_power(sdev, false);



	return 0;

}



static int mtl_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state)

{

	const struct sof_dsp_power_state target_dsp_state = {

		.state = target_state,

		.substate = target_state == SOF_DSP_PM_D0 ?

				SOF_HDA_DSP_PM_D0I3 : 0,

	};

	int ret;



	ret = mtl_suspend(sdev, false);

	if (ret < 0)

		return ret;



	return snd_sof_dsp_set_power_state(sdev, &target_dsp_state);

}



static int mtl_dsp_runtime_suspend(struct snd_sof_dev *sdev)

{

	const struct sof_dsp_power_state target_state = {

		.state = SOF_DSP_PM_D3,

	};

	int ret;



	ret = mtl_suspend(sdev, true);

	if (ret < 0)

		return ret;



	return snd_sof_dsp_set_power_state(sdev, &target_state);

}



static int mtl_resume(struct snd_sof_dev *sdev, bool runtime_resume)

{

#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)

	struct hdac_bus *bus = sof_to_bus(sdev);

	struct hdac_ext_link *hlink = NULL;

#endif



	/* display codec must be powered before link reset */

	hda_codec_i915_display_power(sdev, true);



#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)

	/* check jack status */

	if (runtime_resume) {

		hda_codec_jack_wake_enable(sdev, false);

		if (sdev->system_suspend_target == SOF_SUSPEND_NONE)

			hda_codec_jack_check(sdev);

	}



	/* turn off the links that were off before suspend */

	list_for_each_entry(hlink, &bus->hlink_list, list) {

		if (!hlink->ref_count)

			snd_hdac_ext_bus_link_power_down(hlink);

	}



	/* check dma status and clean up CORB/RIRB buffers */

	if (!bus->cmd_dma_state)

		snd_hdac_bus_stop_cmd_io(bus);

#endif



	return 0;

}



static int mtl_dsp_resume(struct snd_sof_dev *sdev)

{

	const struct sof_dsp_power_state target_state = {

		.state = SOF_DSP_PM_D0,

		.substate = SOF_HDA_DSP_PM_D0I0,

	};

	int ret;



	ret = mtl_resume(sdev, false);

	if (ret < 0)

		return ret;



	return snd_sof_dsp_set_power_state(sdev, &target_state);

}



static int mtl_dsp_runtime_resume(struct snd_sof_dev *sdev)

{

	const struct sof_dsp_power_state target_state = {

		.state = SOF_DSP_PM_D0,

	};

	int ret;



	ret = mtl_resume(sdev, true);

	if (ret < 0)

		return ret;



	return snd_sof_dsp_set_power_state(sdev, &target_state);

}



static void mtl_ipc_dump(struct snd_sof_dev *sdev)

{

	u32 hipcctl;
@@ -785,12 +641,6 @@ int sof_mtl_ops_init(struct snd_sof_dev *sdev) 
	/* dsp core get/put */

	/* TODO: add core_get and core_put */



	/* PM */

	sof_mtl_ops.suspend = mtl_dsp_suspend;

	sof_mtl_ops.resume = mtl_dsp_resume;

	sof_mtl_ops.runtime_suspend = mtl_dsp_runtime_suspend;

	sof_mtl_ops.runtime_resume = mtl_dsp_runtime_resume;



	sdev->private = devm_kzalloc(sdev->dev, sizeof(struct sof_ipc4_fw_data), GFP_KERNEL);

	if (!sdev->private)

		return -ENOMEM;